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1. (WO2017177080) FLAT NO-LEADS PACKAGE WITH IMPROVED CONTACT LEADS

Pub. No.:    WO/2017/177080    International Application No.:    PCT/US2017/026500
Publication Date: Fri Oct 13 01:59:59 CEST 2017 International Filing Date: Sat Apr 08 01:59:59 CEST 2017
IPC: H01L 23/495
H01L 23/31
H01L 21/48
Applicants: MICROCHIP TECHNOLOGY INCORPORATED
Inventors: KITNARONG, Rangsun
PUNYAPOR, Prachit
POOLSUP, Pattarapon
KUMSAI, Swat
Title: FLAT NO-LEADS PACKAGE WITH IMPROVED CONTACT LEADS
Abstract:
According to an embodiment of the present disclosure, a method for manufacturing an integrated circuit (IC) device may include mounting an IC chip onto a center support structure of a leadframe. The leadframe may include: a plurality of pins extending from the center support structure; a groove running perpendicular to the individual pins of the plurality of pins around the center support structure; and a bar connecting the plurality of pins remote from the center support structure. The method may further include: bonding the IC chip to at least some of the plurality of pins; encapsulating the leadframe and bonded IC chip, including filling the groove with encapsulation compound; removing the encapsulation compound from the groove, thereby exposing at least a portion of the individual pins of the plurality of pins; plating the exposed portion of the plurality of pins; and cutting the IC package free from the bar by sawing through the encapsulated lead frame along the groove using a first saw width less than a width of the groove.