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1. (WO2017176027) METHOD FOR SELECTIVELY ETCHING SILICON OXIDE FILM
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Pub. No.: WO/2017/176027 International Application No.: PCT/KR2017/003671
Publication Date: 12.10.2017 International Filing Date: 04.04.2017
IPC:
H01L 21/311 (2006.01) ,H01L 21/3213 (2006.01) ,H01L 21/02 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3105
After-treatment
311
Etching the insulating layers
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3205
Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
321
After-treatment
3213
Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
Applicants: TES CO.,LTD[KR/KR]; 2374-36 Jungbu-Daero, Yangji-Myun, Cheoin-Gu Yongin-Si Gyeonggi-do 17162, KR
Inventors: KWON, Bong-Soo; KR
SIM, Tae-Yong; KR
Agent: LEE, Jae-Hong; KR
Priority Data:
10-2016-004152705.04.2016KR
10-2016-004152805.04.2016KR
Title (EN) METHOD FOR SELECTIVELY ETCHING SILICON OXIDE FILM
(FR) PROCÉDÉ DE GRAVURE SÉLECTIVE D'UN FILM D'OXYDE DE SILICIUM
(KO) 실리콘산화막의 선택적 식각 방법
Abstract:
(EN) The present invention relates to a method for selectively etching a silicon oxide film by using a low-temperature process in a semiconductor manufacturing process and, more specifically, the method comprises the steps of: putting, into a reactor, a substrate having a silicon oxide film and a silicon nitride film formed thereon; setting process conditions including a process temperature having a range of 0°C to 30°C below zero; and supplying process gas into the reactor under the process conditions so as to selectively etch the silicon oxide film with respect to the silicon nitride film.
(FR) La présente invention concerne un procédé de gravure sélective d'un film d'oxyde de silicium à l'aide d'un procédé à basse température dans un procédé de fabrication de semi-conducteurs et, plus particulièrement, le procédé comprend les étapes consistant à : placer, dans un réacteur, un substrat ayant un film d'oxyde de silicium et un film de nitrure de silicium formés sur celui-ci ; définir les conditions de traitement y compris une température de traitement ayant une plage de 0 °C à 30 °C au-dessous de zéro ; et fournir un gaz de traitement dans le réacteur dans les conditions de traitement de façon à graver sélectivement le film d'oxyde de silicium par rapport au film de nitrure de silicium.
(KO) 본 발명은 반도체 제조 공정에서 저온 공정을 이용한 실리콘산화막의 선택적 식각 방법에 관한 것으로서, 더욱 상세하게는 반응기 내로 실리콘산화막 및 실리콘질화막이 형성된 기판이 반입되는 단계, 0℃ ~ 영하 30℃의 범위를 가지는 공정 온도를 포함하는 공정 조건을 설정하는 단계 및 상기 공정 조건 하에서 상기 반응기 내에 공정 가스를 공급함으로써 상기 상기 실리콘산화막을 상기 실리콘질화막에 대하여 선택적으로 식각하는 단계를 포함하는 것을 특징으로 한다.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Korean (KO)
Filing Language: Korean (KO)