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1. (WO2017175296) AMPLIFIER
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2017/175296 International Application No.: PCT/JP2016/061085
Publication Date: 12.10.2017 International Filing Date: 05.04.2016
IPC:
H03F 3/193 (2006.01)
Applicants: MITSUBISHI ELECTRIC CORPORATION[JP/JP]; 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 1008310, JP
Inventors: HAGIWARA, Tatsuya; JP
FUJIWARA, Takanobu; JP
TANIGUCHI, Eiji; JP
Agent: INABA, Tadahiko; JP
Priority Data:
Title (EN) AMPLIFIER
(FR) AMPLIFICATEUR
(JA) 増幅器
Abstract: front page image
(EN) Conventional high frequency amplifiers suffer from a decrease in the saturation output power when idle current is reduced in order to reduce power consumption. This amplifier is equipped with: a first transistor, in which the terminal to which current is supplied is grounded; a second transistor which is stacked-connected to the first transistor; a detector circuit which detects the amplitude of a signal input to the first transistor and outputs a detection signal according to the detected amplitude; and a bias voltage setting circuit which, in accordance with the detection signal, sets a bias voltage for the control terminal of the second transistor.
(FR) Les amplificateurs haute fréquence classiques souffrent d'une diminution de puissance de sortie de saturation lorsque le courant au point mort est réduit dans le but de réduire la consommation d'énergie. La présente invention concerne un amplificateur comprenant : un premier transistor, dont la borne à laquelle le courant est fourni est mise à la masse ; un second transistor qui est connecté empilé au premier transistor ; un circuit de détection qui détecte l'amplitude d'un signal appliqué au premier transistor et délivre un signal de détection en fonction de l'amplitude détectée ; et un circuit de réglage de tension de polarisation qui, conformément au signal de détection, règle une tension de polarisation de la borne de commande du second transistor.
(JA) 従来の高周波増幅器は、消費電力を下げるためにアイドル電流を下げた場合、飽和出力電力が低下するという課題があった。 本発明の増幅器は、被電流供給端子が接地された第1のトランジスタと、第1のトランジスタにスタック接続された第2のトランジスタと、第1のトランジスタに入力される信号の振幅を検波し、検波した振幅に応じて検波信号を出力する検波回路と、検波信号に応じて、第2のトランジスタの制御端子にバイアス電圧を設定するバイアス電圧設定回路とを備える。
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)