WIPO logo
Mobile | Deutsch | Español | Français | 日本語 | 한국어 | Português | Русский | 中文 | العربية |
PATENTSCOPE

Search International and National Patent Collections
World Intellectual Property Organization
Search
 
Browse
 
Translate
 
Options
 
News
 
Login
 
Help
 
Machine translation
1. (WO2017171872) LAYERED SUBSTRATE FOR MICROELECTRONIC DEVICES
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.:    WO/2017/171872    International Application No.:    PCT/US2016/025723
Publication Date: 05.10.2017 International Filing Date: 01.04.2016
IPC:
H01L 29/78 (2006.01), H01L 21/336 (2006.01)
Applicants: INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054 (US)
Inventors: GLASS, Glenn A.; (US).
MURTHY, Anand S.; (US)
Agent: PUGA, Pedro E.; (US)
Priority Data:
Title (EN) LAYERED SUBSTRATE FOR MICROELECTRONIC DEVICES
(FR) SUBSTRAT STRATIFIÉ POUR DISPOSITIFS MICROÉLECTRONIQUES
Abstract: front page image
(EN)The present disclosure provides systems and methods for a layered substrate. A layered substrate may include a core comprising graphite. The layered substrate may also include a coating layer comprising a coating material that surrounds the core, wherein the coating material has a melting point that is greater than a melting point of silicon.
(FR)La présente invention concerne des systèmes et des procédés se rapportant à un substrat stratifié. Un substrat stratifié peut comprendre un noyau comprenant du graphite. Le substrat stratifié peut également comprendre une couche de revêtement comprenant un matériau de revêtement qui entoure le noyau, le matériau de revêtement ayant un point de fusion qui est supérieur à un point de fusion du silicium.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)