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1. (WO2017171846) POLARIZATION GATE STACK SRAM

Pub. No.:    WO/2017/171846    International Application No.:    PCT/US2016/025606
Publication Date: Fri Oct 06 01:59:59 CEST 2017 International Filing Date: Sat Apr 02 01:59:59 CEST 2016
IPC: G11C 11/412
G11C 11/413
Applicants: INTEL CORPORATION
Inventors: MORRIS, Daniel H.
AVCI, Uygar E.
YOUNG, Ian A.
Title: POLARIZATION GATE STACK SRAM
Abstract:
One embodiment provides an apparatus. The apparatus includes a first inverter comprising a first pull up transistor and a first pull down transistor; a second inverter cross coupled to the first inverter, the second inverter comprising a second pull up transistor and a second pull down transistor; a first access transistor coupled to the first inverter; and a second access transistor coupled to the second inverter. A gate electrode of one transistor of each inverter comprises a polarization layer.