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1. (WO2017171794) HIGH RESOLUTION PHOTOMASK OR RETICLE AND ITS METHOD OF FABRICATION
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2017/171794 International Application No.: PCT/US2016/025269
Publication Date: 05.10.2017 International Filing Date: 31.03.2016
IPC:
H01L 21/027 (2006.01) ,G03F 7/20 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
027
Making masks on semiconductor bodies for further photolithographic processing, not provided for in group H01L21/18 or H01L21/34165
G PHYSICS
03
PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
F
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
7
Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
20
Exposure; Apparatus therefor
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054, US
Inventors:
CHOI, Chang Ju; US
Agent:
BRASK, Justin, K.; US
Priority Data:
Title (EN) HIGH RESOLUTION PHOTOMASK OR RETICLE AND ITS METHOD OF FABRICATION
(FR) MASQUE PHOTOGRAPHIQUE OU RÉTICULE HAUTE RÉSOLUTION ET SON PROCÉDÉ DE FABRICATION
Abstract:
(EN) Approaches for fabricating a lithographic mask are described. In an example, a lithographic mask for patterning semiconductor circuits includes a substrate. An in-die region is disposed on the substrate. The in-die region includes a patterned shifter material in direct contact with the substrate. The patterned shifter material includes features having sidewalls. A frame region is disposed on the substrate and surrounding the in-die region. The frame region includes an absorber layer in direct contact with the substrate.
(FR) L'invention concerne des approches de fabrication d'un masque lithographique. Dans un exemple, un masque lithographique pour former des motifs sur des circuits à semi-conducteurs comprend un substrat. Une région sur puce est disposée sur le substrat. La région sur puce comprend un matériau de décalage à motifs en contact direct avec le substrat. Le matériau de décalage à motifs comprend des éléments ayant des parois latérales. Une région de cadre est disposée sur le substrat et entoure la région sur puce. La région de cadre comprend une couche d'absorbeur en contact direct avec le substrat.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)