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1. (WO2017171780) 1T1R RRAM ARCHITECTURE

Pub. No.:    WO/2017/171780    International Application No.:    PCT/US2016/025179
Publication Date: Fri Oct 06 01:59:59 CEST 2017 International Filing Date: Fri Apr 01 01:59:59 CEST 2016
IPC: H01L 45/00
H01L 45/02
Applicants: INTEL CORPORATION
Inventors: MAJHI, Prashant
KARPOV, Elijah V.
PILLARISETTY, Ravi
SHAH, Uday
MUKHERJEE, Niloy
CLARKE, James S.
Title: 1T1R RRAM ARCHITECTURE
Abstract:
One embodiment provides an apparatus. The apparatus includes a first memory cell and a second memory cell. The first memory cell includes a first resistive element. The first resistive element includes a first top electrode, a common bottom electrode, and a first oxide layer sandwiched between the first top electrode and at least a first portion of the common bottom electrode. The second memory cell includes a second resistive element adjacent the first resistive element. The second resistive element includes a second top electrode, the common bottom electrode, and a second oxide layer sandwiched between the second top electrode and at least a second portion of the common bottom electrode.