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1. (WO2017166157) THREE DIMENSIONAL FULLY MOLDED POWER ELECTRONICS MODULE FOR HIGH POWER APPLICATIONS AND THE METHOD THEREOF
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.:    WO/2017/166157    International Application No.:    PCT/CN2016/077977
Publication Date: 05.10.2017 International Filing Date: 31.03.2016
IPC:
H01L 25/10 (2006.01)
Applicants: HONG KONG APPLIED SCIENCE & TECHNOLOGY RESEARCH INSTITUTE COMPANY LIMITED [CN/CN]; 5/F, Photonics Centre, 2 Science Park East Avenue Hong Kong Science Park, Shatin, N.T. Hong Kong (CN)
Inventors: GAO, Ziyang; (CN).
LV, Ya; (CN)
Agent: CHINA TRUER IP; 10A3, Jiangxi Shiji Haoting Building (Jiangxi Building) Shennan Road South, Chegong Miao, Futian District Shenzhen, Guangdong 518040 (CN)
Priority Data:
15/084,442 29.03.2016 US
Title (EN) THREE DIMENSIONAL FULLY MOLDED POWER ELECTRONICS MODULE FOR HIGH POWER APPLICATIONS AND THE METHOD THEREOF
(FR) MODULE ÉLECTRONIQUE DE PUISSANCE TRIDIMENSIONNEL ENTIÈREMENT MOULÉ POUR APPLICATIONS HAUTE PUISSANCE ET SON PROCÉDÉ
Abstract: front page image
(EN)A power electronic package (100) includes a first substrate (110), a second substrate (120) oppositely disposed from the first substrate, one or more chips (130) disposed between the substrates, and at least three spacers (140). The spacers control a height variation of the power electronic package and protect the chips and other electronics from experiencing excessive stress. The height of the spacers is determined based on a height of the chips, on a height of solder blocks (150) that connect the chips to the top substrate, and on a height of solder blocks that connect the chips to the bottom substrate.
(FR)Selon l'invention, un boîtier électronique de puissance (100) comprend un premier substrat (110), un second substrat (120) disposé de manière opposée au premier substrat, une ou plusieurs puces (130) disposées entre les substrats, et au moins trois espaceurs (140). Les espaceurs commandent une variation de hauteur du boîtier électronique de puissance et protègent les puces et d'autres composants électroniques contre une contrainte excessive. La hauteur des espaceurs est déterminée sur la base d'une hauteur des puces, sur une hauteur de blocs de brasure (150) qui relient les puces au substrat supérieur, et sur une hauteur de blocs de brasure qui relient les puces au substrat inférieur.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)