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1. (WO2017155805) SEMICONDUCTOR ON INSULATOR STRUCTURE COMPRISING A LOW TEMPERATURE FLOWABLE OXIDE LAYER AND METHOD OF MANUFACTURE THEREOF
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Pub. No.: WO/2017/155805 International Application No.: PCT/US2017/020619
Publication Date: 14.09.2017 International Filing Date: 03.03.2017
IPC:
H01L 21/762 (2006.01) ,H01L 21/20 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71
Manufacture of specific parts of devices defined in group H01L21/7086
76
Making of isolation regions between components
762
Dielectric regions
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20
Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
Applicants:
GLOBALWAFERS CO., LTD.; No. 8 Industrial East Road 2 Science-Based Industrial Park Hsinchu, Taiwan R.O.C., TW
Inventors:
KWESKIN, Sasha Joseph; US
Agent:
SCHUTH, Richard A.; US
KEPPEL, Nicholas A.; US
MUNSELL, Michael G.; US
POLAND, Eric G.; US
RAYMOND JR., Donald D.; US
VANDER MOLEN, Michael J.; US
ALLEN, Derick E.; US
AMODIO, Lucas M.; US
ATKINS, Bruce T.; US
BEULICK, John S.; US
BLOCK, Zachary J.; US
BRENNAN, Patrick E.; US
BRIDGE, Richard L.; US
BROPHY, Richard L.; US
COYLE, Patrick J.; US
FITZGERALD, Daniel M.; US
FLOREK, Erin M.; US
GOFF, Christopher M.; US
HARPER, James D.; US
HARPER, Jesse S.; US
HEINEN JR., James M.; US
HENSON, James W.; US
HILMERT, Laura J.; US
HOEKEL, Jennifer E.; US
LONGMEYER, Michael H.; US
MCCOLLUM, Darin L.; US
MUELLER, Jacob R.; US
RASCHE, Patrick W.; US
REESER III, Robert B.; US
SLATER, Brian T.; US
SMELCER, Paul L.; US
SNIDER, Josh C.; US
SOOTER, Miranda M.; US
THOMAS, Mark A.; US
VANVLIET, David S.; US
WULLER, Adam R.; US
ZEE-CHENG, Brendan R.; US
ZYCHLEWICZ, William J.; US
DINGLEDINE, Grant A.; US
MCCAY, Michael G.; US
MOLLER-JACOBS, Rose L.; US
VANENGELEN, Catherine E.; US
Priority Data:
62/304,37607.03.2016US
Title (EN) SEMICONDUCTOR ON INSULATOR STRUCTURE COMPRISING A LOW TEMPERATURE FLOWABLE OXIDE LAYER AND METHOD OF MANUFACTURE THEREOF
(FR) STRUCTURE DE SEMI-CONDUCTEUR SUR ISOLANT CONTENANT UNE COUCHE D'OXYDE FLUIDIFIABLE À BASSE TEMPÉRATURE ET SON PROCÉDÉ DE FABRICATION
Abstract:
(EN) A method is provided for preparing a semiconductor-on-insulator structure comprising a flowable insulating layer or a reflowable insulating layer.
(FR) L'invention concerne un procédé de préparation d'une structure de semi-conducteur sur isolant contenant une couche isolante fluidifiable ou une couche isolante pouvant être refluidifiée.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)