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1. (WO2017155668) METHODS AND APPARATUS FOR WORD LINE SHAPING IN MONOLITHIC THREE DIMENSIONAL MEMORY ARRAYS
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Pub. No.: WO/2017/155668 International Application No.: PCT/US2017/017513
Publication Date: 14.09.2017 International Filing Date: 10.02.2017
IPC:
G11C 13/00 (2006.01) ,H01L 45/00 (2006.01) ,H01L 27/24 (2006.01)
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
13
Digital stores characterised by the use of storage elements not covered by groups G11C11/, G11C23/, or G11C25/173
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
45
Solid state devices specially adapted for rectifying, amplifying, oscillating, or switching without a potential-jump barrier or surface barrier, e.g. dielectric triodes; Ovshinsky-effect devices; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
24
including solid state components for rectifying, amplifying, or switching without a potential-jump barrier or surface barrier
Applicants:
SANDISK TECHNOLOGIES LLC [US/US]; 6900 Dallas Parkway, Suite 325 Plano, Texas 75024, US
Inventors:
YOSHIDA, Yusuke; US
OBA, Naoya; US
IUCHI, Hiraoaki; US
Agent:
MAGEN, Burt; US
Priority Data:
15/064,65609.03.2016US
Title (EN) METHODS AND APPARATUS FOR WORD LINE SHAPING IN MONOLITHIC THREE DIMENSIONAL MEMORY ARRAYS
(FR) PROCÉDÉS ET APPAREIL DE MISE EN FORME DE LIGNE DE MOTS DANS DES MATRICES DE MÉMOIRE EN TROIS DIMENSIONS MONOLITHIQUES
Abstract:
(EN) A method is provided that includes forming a vertical bit line (LBL11) disposed in a first direction above a substrate (502), forming a word line (WL10) disposed in a second direction above the substrate, the second direction perpendicular to the first direction, forming a memory cell (M111) including a nonvolatile memory material at an intersection of the vertical bit line and the word line, and forming an irregular shape in the word line in a region of the memory cell.
(FR) L'invention concerne un procédé qui consiste à former une ligne de bits verticale (LBL11) disposée dans une première direction au-dessus d'un substrat (502), former une ligne de mots (WL10) disposée dans une seconde direction au-dessus du substrat, la seconde direction étant perpendiculaire à la première direction, former une cellule de mémoire (M111) comprenant un matériau de mémoire non-volatile au niveau d'une intersection de la ligne de bits verticale et de la ligne de mots, et former une forme irrégulière dans la ligne de mots dans une région de la cellule de mémoire.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)