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1. (WO2017155656) SYSTEM AND METHOD FOR RAM CAPACITY OPTIMIZATION USING ROM-BASED PAGING

Pub. No.:    WO/2017/155656    International Application No.:    PCT/US2017/017127
Publication Date: Fri Sep 15 01:59:59 CEST 2017 International Filing Date: Fri Feb 10 00:59:59 CET 2017
IPC: G06F 12/0802
G06F 12/06
G06F 9/445
Applicants: QUALCOMM INCORPORATED
Inventors: GENG, Nieyan
OPORTUS VALENZUELA, Andres
CHHABRA, Gurvinder Singh
Title: SYSTEM AND METHOD FOR RAM CAPACITY OPTIMIZATION USING ROM-BASED PAGING
Abstract:
Various embodiments of methods and systems for memory paging in a system on a chip ("SoC") are disclosed. An exemplary method includes identifying a subset of a baseline data image stored in a secondary storage device and determining that a revision data image requires an update of the subset. In response to the update, generating a diff file that represents binary differences between the revision data image subset and the baseline data image subset. Next, storing the diff file in a primary storage device and, upon receiving a request for a data block associated with the revision data image that causes a page fault, generating the requested data block based on a combination of the baseline data image and the diff file.