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1. (WO2017155563) TRANSMISSION SCHEME AND INTER-CELL INTERFERENCE MITIGATION FOR FIFTH GENERATION (5G) SYSTEM INFORMATION BLOCK (xSIB)

Pub. No.:    WO/2017/155563    International Application No.:    PCT/US2016/038936
Publication Date: Fri Sep 15 01:59:59 CEST 2017 International Filing Date: Fri Jun 24 01:59:59 CEST 2016
IPC: H04L 5/00
Applicants: INTEL IP CORPORATION
Inventors: XIONG, Gary
ZHANG, Yushu
CHANG, Wenting
FWU, Jong-Kae
ZHU, Yuan
Title: TRANSMISSION SCHEME AND INTER-CELL INTERFERENCE MITIGATION FOR FIFTH GENERATION (5G) SYSTEM INFORMATION BLOCK (xSIB)
Abstract:
Techniques for transmitting Fifth Generation System Information Blocks (xSIBs) are discussed. In one embodiment, one or more processors can be configured to: generate a set of bits for a xSIB; apply coding to the set of bits to generate a coded set of bits; scramble the coded set of bits to generate a scrambled set of bits; modulate the scrambled set of bits to generate a modulated set of xSIB symbols; map the modulated set of xSIB symbols to a set of frequency domain resources to generate a physical xSIB channel; and output the physical xSIB channel to transceiver circuitry for transmission by a plurality of transmit (Tx) beams during a subframe, wherein the physical xSIB channel is output for transmission via one or more distinct Tx beams of the plurality during one or more of a plurality of distinct orthogonal frequency division multiplexing (OFDM) symbols of the subframe.