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1. (WO2017154863) REGULATOR CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE

Pub. No.:    WO/2017/154863    International Application No.:    PCT/JP2017/008889
Publication Date: Fri Sep 15 01:59:59 CEST 2017 International Filing Date: Wed Mar 08 00:59:59 CET 2017
IPC: G05F 1/56
G11C 16/06
Applicants: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
パナソニックIPマネジメント株式会社
Inventors: MOCHIDA Reiji
持田 礼司
ONO Takashi
小野 貴史
Title: REGULATOR CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE
Abstract:
A regulator circuit (101) has a first stopped state, a second stopped state and an operating state, and includes: a detecting circuit portion (11) which detects the magnitude of an output voltage from the regulator circuit (101) and outputs a feedback voltage VFB indicating a detection result to a feedback node; an operational amplifier circuit portion (12) which compares a reference voltage VREF with the voltage at the feedback node and outputs a voltage indicating the result of the comparison; and an output circuit portion (13) which generates an output voltage in accordance with the output from the operational amplifier circuit portion (12). The first stopped state and the second stopped state differ in the state of the feedback node, and the transition time when switching from the second stopped state to the operating state is shorter than the transition time when switching from the first stopped state to the operating state.