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1. (WO2017154593) CONNECTION SUBSTRATE
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Pub. No.: WO/2017/154593 International Application No.: PCT/JP2017/006820
Publication Date: 14.09.2017 International Filing Date: 23.02.2017
IPC:
H05K 1/11 (2006.01) ,H01L 23/13 (2006.01) ,H05K 1/09 (2006.01) ,H05K 3/40 (2006.01)
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1
Printed circuits
02
Details
11
Printed elements for providing electric connections to or between printed circuits
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
12
Mountings, e.g. non-detachable insulating substrates
13
characterised by the shape
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1
Printed circuits
02
Details
09
Use of materials for the metallic pattern
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3
Apparatus or processes for manufacturing printed circuits
40
Forming printed elements for providing electric connections to or between printed circuits
Applicants:
日本碍子株式会社 NGK INSULATORS, LTD. [JP/JP]; 愛知県名古屋市瑞穂区須田町2番56号 2-56, Suda-cho, Mizuho-ku, Nagoya-shi, Aichi 4678530, JP
Inventors:
井出 晃啓 IDE Akiyoshi; JP
高垣 達朗 TAKAGAKI Tatsuro; JP
宮澤 杉夫 MIYAZAWA Sugio; JP
Agent:
細田 益稔 HOSODA Masutoshi; JP
青木 純雄 AOKI Sumio; JP
Priority Data:
2016-04816311.03.2016JP
Title (EN) CONNECTION SUBSTRATE
(FR) SUBSTRAT DE CONNEXION
(JA) 接続基板
Abstract:
(EN) A through-conductor 11 provided within a through-hole in a ceramic substrate has a metal porous body 20, glass phases 17, 19 formed in air holes 16A-16D in the metal porous body 20, and voids 30, 31 within the air holes. The area ratio of the air holes in a cross-section of the through-conductor 11 is 5-50%. When the through-conductor 11 is divided into a first portion 11A on a first-main-surface 11a side and a second portion 11B on a second-main-surface 11b side as viewed along the thickness direction B of the ceramic substrate, the area ratio of the glass phases in the first portion 11A is greater than the area ratio of the glass phases in the second portion 11B, and the area ratio of the voids in the first portion 11A is less than the area ratio of the voids in the second portion 11B.
(FR) Un conducteur traversant 11 disposé à l'intérieur d'un trou traversant dans un substrat en céramique a un corps poreux métallique 20, des phases vitreuses 17, 19 formées dans des trous d'air 16A-16D dans le corps poreux métallique 20, et des vides 30, 31 à l'intérieur des trous d'air. Le rapport de surface des trous d'air dans une section transversale du conducteur traversant 11 est de 5 à 50 %. Lorsque le conducteur traversant 11 est divisé en une première partie 11A du côté d'une première surface principale 11a et en une seconde partie 11B du côté d'une seconde surface principale 11b tel que vu dans le sens de l'épaisseur B du substrat en céramique, le rapport de surface des phases vitreuses dans la première partie 11A est supérieur au rapport de surface des phases vitreuses dans la seconde partie 11B, et le rapport de surface des vides dans la première partie 11A est inférieur au rapport de surface des vides dans la seconde partie 11B.
(JA) セラミック基板の貫通孔内に設けられた貫通導体11が、金属多孔体20、金属多孔体20の気孔16A~16Dに形成されているガラス相17、19および気孔内の空隙30、31を有する。貫通導体11の横断面において気孔の面積比率が5~50%である。貫通導体11をセラミック基板の厚さ方向Bに見て第一の主面11a側の第一の部分11Aと第二の主面側11bの第二の部分11Bとに分けたとき、第一の部分11Aにおけるガラス相の面積比率が第二の部分11Bにおけるガラス相の面積比率よりも大きく、第一の部分11Aにおける空隙の面積比率が第二の部分11Bにおける空隙の面積比率よりも小さい。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)