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1. (WO2017151264) TECHNOLOGIES FOR CORRECTING FLIPPED BITS FOR AN ERROR CORRECTION DECODE PROCESS

Pub. No.:    WO/2017/151264    International Application No.:    PCT/US2017/015957
Publication Date: Sat Sep 09 01:59:59 CEST 2017 International Filing Date: Thu Feb 02 00:59:59 CET 2017
IPC: G06F 11/08
G06F 11/10
Applicants: INTEL CORPORATION
Inventors: KWOK, Zion S.
Title: TECHNOLOGIES FOR CORRECTING FLIPPED BITS FOR AN ERROR CORRECTION DECODE PROCESS
Abstract:
Technologies for correcting flipped bits prior to performing an error correction decode process include an apparatus that includes a memory to store a redundant set of codewords and a controller to read data from the memory. The controller selects a codword from the redundant set of codewords to read from the memory, analyzes the selected codewords to determine whether the codeword contains uncorrectable errors, reads remaining codewords in the redundant set that correspond to the selected codeword, combines the remaining codewords together to generate a rebuilt codeword, flips bits in sections of the rebuilt codeword that differ from the selected codeword by a threshold amount, and performs an error correction decode process based on the rebuilt codeword.