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1. (WO2017151223) LOW COST INBUILT DETERMINISTIC TESTER FOR SOC TESTING

Pub. No.:    WO/2017/151223    International Application No.:    PCT/US2017/012857
Publication Date: Sat Sep 09 01:59:59 CEST 2017 International Filing Date: Wed Jan 11 00:59:59 CET 2017
IPC: G06F 12/02
G06F 11/22
Applicants: INTEL CORPORATION
Inventors: PAPPU, Lakshminarayana
CALLAHAN, Timothy J.
LEVY, Tomer
Title: LOW COST INBUILT DETERMINISTIC TESTER FOR SOC TESTING
Abstract:
A method and system for high speed on chip testing for quality assurance. A multi-core system on a chip has a plurality of processing cores. The cores act as transaction agents with an auto-response unit fabricated on the chip at a chip boundary, the auto-response unit to provide a deterministic return value based on a logical address of a received read request.