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1. (WO2017151192) HYBRID REFERENCE GENERATION FOR FERROELECTRIC RANDOM ACCESS MEMORY
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Pub. No.: WO/2017/151192 International Application No.: PCT/US2016/060467
Publication Date: 08.09.2017 International Filing Date: 04.11.2016
IPC:
G11C 11/22 (2006.01) ,H01L 27/115 (2017.01)
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
11
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21
using electric elements
22
using ferroelectric elements
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
105
including field-effect components
112
Read-only memory structures
115
Electrically programmable read-only memories
Applicants:
CYPRESS SEMICONDUCTOR CORPORATION [US/US]; 198 Champion Court San Jose, California 95134, US
Inventors:
CHU, Fan; US
SUN, Shan; US
DEVILBISS, Alan; US
DAVENPORT, Thomas; US
Priority Data:
15/179,07010.06.2016US
62/302,92203.03.2016US
Title (EN) HYBRID REFERENCE GENERATION FOR FERROELECTRIC RANDOM ACCESS MEMORY
(FR) GÉNÉRATION DE RÉFÉRENCE HYBRIDE POUR MÉMOIRE VIVE FERROÉLECTRIQUE
Abstract:
(EN) An apparatus that includes a reference generating circuit configured to generate a reference signal for a non-volatile memory (NVM) device, the reference generating circuit including a first circuit comprising at least one metal-oxide-semiconductor capacitor, the first circuit generating a first signal component of the reference signal, and a second circuit comprising at least one ferroelectric capacitor, the second circuit generating a second signal component of the reference signal, in which the second signal component is temperature dependent.
(FR) L'invention concerne un appareil qui comprend un circuit de génération de référence configuré pour générer un signal de référence pour un dispositif de mémoire non-volatile (NVM), le circuit de génération de référence comprenant un premier circuit comportant au moins un condensateur semi-conducteur d'oxyde métallique, le premier circuit générant une première composante de signal du signal de référence, et un second circuit comportant au moins un condensateur ferroélectrique, le second circuit générant une seconde composante de signal du signal de référence, la seconde composante de signal étant dépendante de la température.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)