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1. (WO2017151138) ATOMIC MEMORY OPERATION
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/151138 International Application No.: PCT/US2016/020719
Publication Date: 08.09.2017 International Filing Date: 03.03.2016
IPC:
G06F 15/167 (2006.01) ,G06F 12/04 (2006.01) ,G06F 13/14 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
15
Digital computers in general; Data processing equipment in general
16
Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
163
Interprocessor communication
167
using a common memory, e.g. mailbox
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
12
Accessing, addressing or allocating within memory systems or architectures
02
Addressing or allocation; Relocation
04
Addressing variable-length words or parts of words
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
13
Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
14
Handling requests for interconnection or transfer
Applicants:
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP [US/US]; 11445 Compaq Center Drive West Houston, Texas 77070, US
Inventors:
TOURRILHES, Jean; US
SCHLANSKER, Michael; US
Agent:
FOUGERE, Jeffrey R.; US
Priority Data:
Title (EN) ATOMIC MEMORY OPERATION
(FR) OPÉRATION DE MÉMOIRE ATOMIQUE
Abstract:
(EN) An atomic memory operation system comprises a memory fabric coupling a receiving node and a sending node. The memory fabric executes an atomic memory operation by identifying a control word of a ring buffer using a memory address of the memory operation. The memory fabric then retrieves a tail index from the control word, wherein the tail index indicates a position in a ring buffer, and inserts a memory word in the ring buffer at the position indicated by the tail index, wherein the memory word corresponds to the memory operation. Finally, the memory fabric updates the tail index in the control word to point to a next slot in the ring buffer.
(FR) L'invention concerne un système d'opération de mémoire atomique qui comprend une matrice de mémoire couplant un nœud de réception et un nœud d'émission. La matrice de mémoire exécute une opération de mémoire atomique en identifiant un mot de contrôle d'une mémoire tampon circulaire à l'aide d'une adresse mémoire de l'opération de mémoire. La matrice de mémoire récupère ensuite un indice de queue à partir du mot de contrôle, l'indice de queue indiquant une position dans une mémoire tampon circulaire, et insère un mot mémoire dans la mémoire tampon circulaire à la position indiquée par l'indice de queue, le mot mémoire correspondant à l'opération de mémoire. Enfin, la matrice de mémoire met à jour l'indice de queue dans le mot de contrôle pour indiquer un prochain banc dans la mémoire tampon circulaire.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)