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1. (WO2017149957) SIGNAL OUTPUT CIRCUIT

Pub. No.:    WO/2017/149957    International Application No.:    PCT/JP2017/001216
Publication Date: Sat Sep 09 01:59:59 CEST 2017 International Filing Date: Tue Jan 17 00:59:59 CET 2017
IPC: H03K 17/16
H03K 4/94
H03K 19/0175
Applicants: DENSO CORPORATION
株式会社デンソー
Inventors: OKA, Norimasa
岡 典正
KAWAGO, Hiroshi
川合 博史
Title: SIGNAL OUTPUT CIRCUIT
Abstract:
This signal output circuit (1, 21, 41, 51, 61, 71) comprises an output circuit (6, 64), a pseudo-output circuit (9, 28, 65), a capacitor (12, 34) and a slope control circuit (7, 30). The output circuit is equipped with a transistor (3, 62), and outputs an output signal OUT. The pseudo-output circuit has a structure that is at least partially similar to the output circuit. The capacitor is connected between an input node (N1) and an output node (N2) of the pseudo-output circuit. The slope control circuit charges and discharges the capacitor according to the level of a control signal IN, and drives the transistor using the voltage Vc of the input node, thereby controlling the slope of the output signal OUT. The pseudo-output circuit is equipped with a transistor (11, 66) having a gate connected to the input node and a drain connected to the output node, and has the same circuit format as the output circuit.