Search International and National Patent Collections

1. (WO2017149925) SEMICONDUCTOR PROCESSING SHEET

Pub. No.:    WO/2017/149925    International Application No.:    PCT/JP2017/000186
Publication Date: Sat Sep 09 01:59:59 CEST 2017 International Filing Date: Fri Jan 06 00:59:59 CET 2017
IPC: H01L 21/301
C09J 7/02
C09J 201/00
H01L 21/304
Applicants: LINTEC CORPORATION
リンテック株式会社
Inventors: SATO Akinori
佐藤 明徳
NAKAMURA Masatomo
中村 優智
YAMASHITA Shigeyuki
山下 茂之
Title: SEMICONDUCTOR PROCESSING SHEET
Abstract:
This semiconductor processing sheet 1 comprises at least a substrate 10, a semiconductor bonding layer 80, and a peeling film 30, wherein: a first surface 101 of the substrate 10 has an arithmetic mean roughness Ra from 0.01 to 0.8 µm; and if α is defined as the peeling force at the interface between the first surface 101 of the substrate 10 and a second surface 302 of the peeling film 30 and β is defined as the peeling force at the interface between a second surface 802 of the semiconductor bonding layer 80 and a first surface 301 of the peeling film 30, the value (α/β) of the ratio of α to β is 0 or greater to less than 1.0, and the peeling force β is from 10 to 1000 mN/50 mm. This semiconductor processing sheet 1 has excellent light transmissibility, and blocking is less likely to occur.