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1. (WO2017149714) POWER SEMICONDUCTOR DEVICE AND POWER SEMICONDUCTOR CORE MODULE
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2017/149714 International Application No.: PCT/JP2016/056526
Publication Date: 08.09.2017 International Filing Date: 03.03.2016
IPC:
H01L 25/07 (2006.01) ,H01L 21/52 (2006.01) ,H01L 25/18 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
07
the devices being of a type provided for in group H01L29/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
52
Mounting semiconductor bodies in containers
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
18
the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/-H01L51/160
Applicants:
三菱電機株式会社 MITSUBISHI ELECTRIC CORPORATION [JP/JP]; 東京都千代田区丸の内二丁目7番3号 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 1008310, JP
Inventors:
玉田 美子 TAMADA Yoshiko; JP
山口 義弘 YAMAGUCHI Yoshihiro; JP
岡 誠次 OKA Seiji; JP
本宮 哲男 MOTOMIYA Tetsuo; JP
Agent:
吉竹 英俊 YOSHITAKE Hidetoshi; JP
Priority Data:
Title (EN) POWER SEMICONDUCTOR DEVICE AND POWER SEMICONDUCTOR CORE MODULE
(FR) DISPOSITIF À SEMI-CONDUCTEUR DE PUISSANCE ET MODULE CENTRAL À SEMI-CONDUCTEUR DE PUISSANCE
(JA) 電力用半導体装置及び電力用半導体コアモジュール
Abstract:
(EN) The purpose of the present invention is to provide a pressure contact type power semiconductor device capable of suitably reducing sizes, and a power semiconductor core module. Each power semiconductor core module of the present invention is provided with: a plurality of power semiconductor chips, each of which includes a plurality of self-arc-extinguishing semiconductor elements and a plurality of diodes, which are adjacent to each other in plan view; and a plurality of first springs disposed between an upper metal plate and a conductive cover plate. The self-arc-extinguishing semiconductor elements of each power semiconductor core module are disposed along an L-shaped line or X-shaped lines or T-shaped lines in plan view.
(FR) L'objet de la présente invention est de pourvoir à un dispositif à semi-conducteur de puissance du type à contact de pression permettant une réduction de taille appropriée, et un module central à semi-conducteur de puissance. Chaque module central à semi-conducteur de puissance de la présente invention comprend : une pluralité de puces de semi-conducteur de puissance, dont chacune comprend une pluralité d'éléments à semi-conducteur d'extinction d'arc automatique et une pluralité de diodes, qui sont adjacentes les unes aux autres en vue plane ; et une pluralité de premiers ressorts disposés entre une plaque métallique supérieure et une plaque de recouvrement conductrice. Les éléments à semi-conducteur d'extinction d'arc automatique de chaque module central à semi-conducteur de puissance sont disposés le long d'une ligne en L ou de lignes en X ou de lignes en T en vue plane.
(JA)  適切に小型化可能な圧力接触型の電力用半導体装置及び電力用半導体コアモジュールを提供することを目的とする。各電力用半導体コアモジュールは、平面視において隣接された複数の自己消弧型半導体素子及び複数のダイオード、を含む複数の電力用半導体チップと、上側金属板と、導電性カバープレートとの間に配設された複数の第1バネとを備える。各電力用半導体コアモジュールの複数の自己消弧型半導体素子が、平面視においてL字型、十字型、及び、T字型のいずれか1つの線に沿って配列されている。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)