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1. (WO2017149624) POWER SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING POWER SEMICONDUCTOR DEVICE

Pub. No.:    WO/2017/149624    International Application No.:    PCT/JP2016/056132
Publication Date: Sat Sep 09 01:59:59 CEST 2017 International Filing Date: Tue Mar 01 00:59:59 CET 2016
IPC: H01L 29/78
Applicants: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
新電元工業株式会社
Inventors: ARAI, Daisuke
新井 大輔
KITADA, Mizue
北田 瑞枝
ASADA, Takeshi
浅田 毅
YAMAGUCHI, Takeshi
山口 武司
SUZUKI, Noriaki
鈴木 教章
HIRASAWA, Wataru
平澤 亘
MURAKAMI, Koichi
村上 晃一
NAKANISHI, Katsufumi
中西 克文
Title: POWER SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING POWER SEMICONDUCTOR DEVICE
Abstract:
A power semiconductor device 100 of the present invention is provided with: a low resistance semiconductor layer 112; an n- type drift region 114; a p type base region 116; a plurality of trenches 118; a gate insulating film 120; a gate electrode 122; an n+ type source region 124; an interlayer insulating film 126; a contact hole 128; a metal plug 130 formed by filling the inside of the contact hole 128 with a predetermined metal; a p+ type diffusion region 132, which is in contact with the bottom surface of the metal plug 130, and which reaches the drift region 114 by penetrating the base region 116 from the bottom surface of the metal plug 130, said p+ type diffusion region having an impurity concentration that is higher than that of the base region 116; and a source electrode 134 electrically connected to the base region 116, the source region 124, and the p+ type diffusion region 132 via the metal plug 130. The power semiconductor device of the present invention meets the demands of cost reduction and size reduction of electronic apparatuses, and has a high breakdown strength.