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1. (WO2017148348) THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREFOR, DISPLAY PANEL AND DISPLAY APPARATUS
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Pub. No.: WO/2017/148348 International Application No.: PCT/CN2017/075001
Publication Date: 08.09.2017 International Filing Date: 27.02.2017
IPC:
H01L 29/786 (2006.01) ,H01L 27/12 (2006.01) ,H01L 29/06 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12
the substrate being other than a semiconductor body, e.g. an insulating body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
Applicants:
昆山工研院新型平板显示技术中心有限公司 KUNSHAN NEW FLAT PANEL DISPLAY TECHNOLOGY CENTER CO., LTD. [CN/CN]; 中国江苏省昆山市 开发区光电产业园富春江路320号 No.320, Fu Chun River Road, Photoelectric Industrial Park, Development Zone KunShan, Jiangsu 215300, CN
Inventors:
单奇 SHAN, Qi; CN
胡坤 HU, Kun; CN
林立 LIN, Li; CN
刘嵩 LIU, Song; CN
Agent:
上海思微知识产权代理事务所(普通合伙) SHANGHAI SAVVY INTELLECTUAL PROPERTY AGENCY; 中国上海市 长宁区天山西路789号1幢341室 Room 341, Building 1 789 West Tianshan Road, Changning District Shanghai 200335, CN
Priority Data:
201610111984.X29.02.2016CN
Title (EN) THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREFOR, DISPLAY PANEL AND DISPLAY APPARATUS
(FR) TRANSISTOR EN COUCHES MINCES ET SON PROCÉDÉ DE FABRICATION, PANNEAU D'AFFICHAGE ET APPAREIL D'AFFICHAGE
(ZH) 薄膜晶体管及其制造方法、显示面板及显示装置
Abstract:
(EN) Provided are a thin film transistor and a manufacturing method therefor, a display panel and a display apparatus. The thin film transistor comprises an active region (11), a gate insulation layer (12), a gate electrode (13), a source electrode (14), a drain electrode (15), a passivation layer (16) and a planarization layer (17) that are successively formed on a flexible substrate (10). A protection layer (18) is formed between the passivation layer (16) and the planarization layer (17), and the protection layer (18) is located right above the active region (11) and the gate electrode (13). A semiconductor material of a vertical region of a thin film transistor is protected by means of the protection layer (18), so as to reduce a stress undergone by part of the material of the thin film transistor during the process of bending, and to avoid the damage that may be caused to the semiconductor material during the process of bending a thin film transistor device, thus improving the quality of the device.
(FR) L'invention concerne un transistor en couches minces et son procédé de fabrication, un panneau d'affichage et un appareil d'affichage. Le transistor en couches minces comprend une région active (11), une couche d'isolation de grille (12), une électrode de grille (13), une électrode de source (14), une électrode de drain (15), une couche de passivation (16) et une couche de planarisation (17) qui sont successivement formées sur un substrat souple (10). Une couche de protection (18) est formée entre la couche de passivation (16) et la couche de planarisation (17), et la couche de protection (18) est située juste au-dessus de la région active (11) et de l'électrode de grille (13). Un matériau semi-conducteur d'une région verticale d'un transistor en couches minces est protégé au moyen de la couche de protection (18), de façon à réduire une contrainte subie par une partie du matériau du transistor en couches minces durant le processus de courbure, et à éviter les dommages qui peuvent être provoqués sur le matériau semi-conducteur durant le processus de courbure d'un dispositif de transistor en couches minces, permettant ainsi d'améliorer la qualité du dispositif.
(ZH) 提供一种薄膜晶体管及其制造方法、显示面板及显示装置,薄膜晶体管包括依次形成于柔性衬底(10)上的有源区(11)、栅极绝缘层(12)、栅极(13)、源极(14)、漏极(15)、钝化层(16)以及平坦化层(17),在钝化层(16)与平坦化层(17)之间形成有保护层(18),保护层(18)位于有源区(11)及栅极(13)的正上方;通过保护层(18)对薄膜晶体管垂直区域的半导体材料产生保护作用,从而降低薄膜晶体管部分材料在弯曲过程中受到的应力,避免薄膜晶体管器件在弯曲过程中可能会造成的半导体材料的损伤,进而提高器件的质量。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)