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1. (WO2017135971) SYSTEM AND METHOD FOR STACKING WIRE-BOND CONVERTED FLIP-CHIP DIE
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/135971 International Application No.: PCT/US2016/016881
Publication Date: 10.08.2017 International Filing Date: 05.02.2016
IPC:
H01L 25/07 (2006.01) ,H01L 23/48 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
07
the devices being of a type provided for in group H01L29/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054, US
Inventors:
GOH, Eng Huat; MY
LIM, Chu Aun; MY
SHETH, Upendra R.; US
STARKSTON, Robert; US
Agent:
KACVINSKY, John F.; US
Priority Data:
Title (EN) SYSTEM AND METHOD FOR STACKING WIRE-BOND CONVERTED FLIP-CHIP DIE
(FR) SYSTÈME ET PROCÉDÉ D'EMPILAGE D’UNE MATRICE À PUCE RETOURNÉE À FIL DE CONNEXION CONVERTI
Abstract:
(EN) Various embodiments are generally directed to an electronic assembly comprising at least two dies stacked on top of each other. Metal columns of different heights electrically connect the dies to a system substrate.
(FR) Divers modes de réalisation concernent généralement un ensemble électronique comprenant au moins deux puces empilées les unes sur les autres. Des colonnes métalliques de différentes hauteurs qui relient électriquement les matrices à un substrat de système.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
CN108475671