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1. (WO2017135624) SENSOR PACKAGE AND METHOD FOR PREPARING SAME
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/135624 International Application No.: PCT/KR2017/000802
Publication Date: 10.08.2017 International Filing Date: 24.01.2017
IPC:
H01L 25/07 (2006.01) ,H01L 23/31 (2006.01) ,H01L 23/48 (2006.01) ,H01L 23/495 (2006.01) ,H01L 23/522 (2006.01) ,H01L 23/538 (2006.01) ,H01L 25/11 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
07
the devices being of a type provided for in group H01L29/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
28
Encapsulation, e.g. encapsulating layers, coatings
31
characterised by the arrangement
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
488
consisting of soldered or bonded constructions
495
Lead-frames
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
52
Arrangements for conducting electric current within the device in operation from one component to another
522
including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
52
Arrangements for conducting electric current within the device in operation from one component to another
538
the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
10
the devices having separate containers
11
the devices being of a type provided for in group H01L29/78
Applicants:
주식회사 네패스 NEPES CO., LTD. [KR/KR]; 충청북도 음성군 삼성면, 금일로965번길, 105 105 Geumil-ro 965beon-gil, Samseong-myeon Eumseong-gun Chungcheongbuk-do 27651, KR
Inventors:
이응주 LEE, Eung Ju; KR
임시우 LIM, Si Woo; KR
오동훈 OH, Dong Hoon; KR
Agent:
특허법인 세림 SELIM INTELLECTUAL PROPERTY LAW FIRM; 서울시 서초구 강남대로, 285 태우빌딩, 10층과 11층 10F and 11F, Taewoo Bldg. 285, Gangnam-daero Seocho-gu Seoul 06729, KR
Priority Data:
10-2016-001395904.02.2016KR
Title (EN) SENSOR PACKAGE AND METHOD FOR PREPARING SAME
(FR) BOÎTIER DE CAPTEUR ET SON PROCÉDÉ DE PRÉPARATION
(KO) 센서 패키지 및 이의 제조 방법
Abstract:
(EN) Disclosed are a sensor package and a method for preparing same. A sensor package, according to an embodiment of the present invention, comprises: a semiconductor chip comprising a sensor pattern which is externally exposed; a substrate comprising an accommodation part in which the semiconductor chip is accommodated; a sealant for integrally molding the semiconductor chip and substrate; through wiring vertically passing through the substrate; a wiring unit electrically interconnecting the semiconductor chip and through wiring and exposing the sensor pattern of the semiconductor chip; and an external connection unit electrically connected to the other side of the through wiring and electrically connectable to the outside.
(FR) La présente invention concerne un boîtier de capteur et son procédé de préparation. Un boîtier de capteur, selon un mode de réalisation de la présente invention, comprend : une puce à semi-conducteur comprenant un motif de capteur qui est exposé de façon externe ; un substrat comprenant une partie de logement dans laquelle la puce à semi-conducteur est logée ; un matériau d’étanchéité pour mouler de façon intégrée la puce à semi-conducteur et le substrat ; un câblage traversant traversant verticalement le substrat ; une unité de câblage interconnectant électriquement la puce à semi-conducteur et le câblage traversant et exposant le motif de capteur de la puce à semi-conducteur ; et une unité de connexion externe électriquement connectée à l’autre côté du câblage traversant et pouvant être électriquement connectée à l’extérieur.
(KO) 센서 패키지 및 이의 제조 방법이 개시된다. 본 발명의 일 실시예에 따른 센서 패키지는, 외부로 노출되는 센서 패턴을 포함하는 반도체 칩, 상기 반도체 칩이 수용되는 수용부를 포함하는 기판, 상기 반도체 칩 및 상기 기판을 일체화하도록 몰딩하는 봉지재, 상기 기판을 상하 방향으로 관통하는 관통 배선, 상기 반도체 칩 및 상기 관통 배선을 전기적으로 서로 연결하며, 상기 반도체 칩의 상기 센서 패턴을 노출하는 배선부 및 상기 관통 배선의 타 측과 전기적으로 연결되고 외부에 전기적으로 접속 가능한 외부 접속부를 포함한다.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Korean (KO)
Filing Language: Korean (KO)
Also published as:
CN208767298