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1. (WO2017135605) MEMORY CHIP, MEMORY DEVICE AND MEMORY SYSTEM COMPRISING SAME DEVICE
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/135605 International Application No.: PCT/KR2017/000726
Publication Date: 10.08.2017 International Filing Date: 20.01.2017
IPC:
G11C 5/14 (2006.01) ,G11C 5/04 (2006.01) ,G11C 11/4074 (2006.01) ,G11C 16/30 (2006.01) ,G06F 13/16 (2006.01)
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
5
Details of stores covered by group G11C11/63
14
Power supply arrangements
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
5
Details of stores covered by group G11C11/63
02
Disposition of storage elements, e.g. in the form of a matrix array
04
Supports for storage elements; Mounting or fixing of storage elements on such supports
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
11
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21
using electric elements
34
using semiconductor devices
40
using transistors
401
forming cells needing refreshing or charge regeneration, i.e. dynamic cells
4063
Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
407
for memory cells of the field-effect type
4074
Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
06
Auxiliary circuits, e.g. for writing into memory
30
Power supply circuits
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
13
Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
14
Handling requests for interconnection or transfer
16
for access to memory bus
Applicants:
주식회사티에스피글로벌 TSP GLOBAL, CO., LTD. [KR/KR]; 경기도 화성시 동탄면 동탄산단10길 67 67 Dontansandan 10-gil,Dongtan-myeon Hwaseong-si Gyeonggi-do 18487, KR
Inventors:
강상석 KANG, Sangseok; KR
최창주 CHOI, Chang-Zoo; KR
이선영 LEE, Sun-Young; KR
이진석 LEE, Jin-seok; KR
Agent:
김기환 KIM, Kihwan; KR
Priority Data:
10-2016-001327403.02.2016KR
Title (EN) MEMORY CHIP, MEMORY DEVICE AND MEMORY SYSTEM COMPRISING SAME DEVICE
(FR) PUCE DE MÉMOIRE, DISPOSITIF MÉMOIRE ET SYSTÈME DE MÉMOIRE COMPRENANT LEDIT DISPOSITIF
(KO) 메모리칩, 메모리 장치 및 이 장치를 구비하는 메모리 시스템
Abstract:
(EN) The present application relates to a memory chip in which a power voltage is independently supplied to a memory cell array and a peripheral circuit, a memory device and a memory system comprising the same device. A memory device according to an embodiment of the present invention comprises: at least one memory chip comprising a memory cell array consisting of an array of memory cells and a peripheral circuit which is positioned around the memory cell array and in which a power line electrically independent from the memory cell array is formed; and a power voltage supply for supplying a power voltage to the memory cell array and the peripheral circuit, wherein the power voltage supply independently supplies the power voltage to each of the memory cell array and the peripheral circuit.
(FR) La présente invention concerne une puce de mémoire selon laquelle une tension d'alimentation est appliquée de manière indépendante à un réseau de cellules de mémoire et à un circuit périphérique, un dispositif mémoire et un système de mémoire comprenant ledit dispositif. Un dispositif mémoire selon un mode de réalisation de la présente invention comprend : au moins une puce de mémoire comprenant un réseau de cellules de mémoire constitué d'un réseau de cellules de mémoire et d'un circuit périphérique qui est positionné autour du réseau de cellules de mémoire et dans lequel est formée une ligne d'alimentation électriquement indépendante du réseau de cellules de mémoire; et une source de tension d'alimentation destinée à appliquer une tension d'alimentation au réseau de cellules de mémoire et au circuit périphérique, la source de tension d'alimentation appliquant la tension d'alimentation indépendamment au réseau de cellules de mémoire et au circuit périphérique.
(KO) 본 출원은 메모리셀 어레이 및 주변회로에 독립적으로 전원전압이 공급되는 메모리칩, 메모리 장치 및 이 장치를 구비하는 메모리 시스템에 관한 것이다. 본 발명의 일 실시예에 따른 메모리 장치는, 메모리셀의 배열로 이루어진 메모리셀 어레이 및 상기 메모리셀 어레이 주변에 위치하고 상기 메모리셀 어레이와 전기적으로 독립된 전원라인이 형성되는 주변회로로 구성된 적어도 하나의 메모리칩; 및 상기 메모리셀 어레이와 상기 주변회로에 전원전압을 공급하는 전원전압 공급부를 포함하되, 상기 전원전압 공급부는 상기 메모리셀 어레이와 상기 주변회로에 각각 독립적으로 전원전압을 공급하는 것을 구성상의 특징으로 한다.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Korean (KO)
Filing Language: Korean (KO)
Also published as:
CN108701472US20190018468