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1. (WO2017131639) DRAM-LEVEL ERROR INJECTION AND TRACKING
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/131639 International Application No.: PCT/US2016/014931
Publication Date: 03.08.2017 International Filing Date: 26.01.2016
IPC:
G11C 29/02 (2006.01) ,G06F 11/10 (2006.01)
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
29
Checking stores for correct operation; Testing stores during standby or offline operation
02
Detection or location of defective auxiliary circuits, e.g. defective refresh counters
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
07
Responding to the occurrence of a fault, e.g. fault tolerance
08
Error detection or correction by redundancy in data representation, e.g. by using checking codes
10
Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens
Applicants:
1/1HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP [US/US]; 11445 Compaq Center Drive West Houston, Texas 77070, US
Inventors:
BENEDICT, Melvin K.; US
BACCHUS, Reza M.; US
HARNOLD, Chi-li-ma; US
Agent:
FEBBO, Michael A.; US
Priority Data:
Title (EN) DRAM-LEVEL ERROR INJECTION AND TRACKING
(FR) INJECTION ET SUIVI D’ERREUR AU NIVEAU DE LA DRAM
Abstract:
(EN) One example includes a system. The system includes an error injection system. The error injection system includes an error injector to store a programmable control structure to define a memory error. The error injector being further used to inject the memory error into a respective one of a plurality of memory storage elements associated with a memory system at a predetermined address via an address controller and to determine if the memory error at the predetermined address associated with the respective one of the plurality of memory storage elements is corrected via error-correcting code (ECC) memory associated with the memory system.
(FR) Selon un exemple, l’invention concerne un système. Le système inclut un système d’injection d’erreur. Le système d’injection d’erreur inclut un injecteur d’erreur pour enregistrer une structure de contrôle programmable pour définir une erreur de mémoire. L’injecteur d’erreur sert en outre à injecter l’erreur de mémoire dans un élément respectif d’une pluralité d’éléments d’enregistrement de mémoire associés à un système de mémoire à une adresse préétablie au moyen d’un contrôleur d’adresses et à déterminer si l’erreur de mémoire à l’adresse préétablie associée à l’élément respectif de la pluralité d’éléments d’enregistrement de mémoire est corrigée au moyen d’une mémoire de code de correction d’erreurs (ECC) associée au système de mémoire.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
US20190013085