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1. WO2017131092 - WIRING SUBSTRATE, OPTICAL SEMICONDUCTOR ELEMENT PACKAGE, AND OPTICAL SEMICONDUCTOR DEVICE

Publication Number WO/2017/131092
Publication Date 03.08.2017
International Application No. PCT/JP2017/002745
International Filing Date 26.01.2017
IPC
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
02
Containers; Seals
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
02
Containers; Seals
04
characterised by the shape
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
12
Mountings, e.g. non-detachable insulating substrates
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
31
Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength, or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
02
Details
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
S
DEVICES USING STIMULATED EMISSION
5
Semiconductor lasers
02
Structural details or components not essential to laser action
022
Mountings; Housings
H01L 23/02 (2006.01)
H01L 23/04 (2006.01)
H01L 23/12 (2006.01)
H01L 31/02 (2006.01)
H01S 5/022 (2006.01)
CPC
H01L 2224/32225
H01L 2224/48091
H01L 2224/48227
H01L 2224/73265
H01L 23/02
H01L 23/04
Applicants
  • 京セラ株式会社 KYOCERA CORPORATION [JP/JP]; 京都府京都市伏見区竹田鳥羽殿町6番地 6, Takeda Tobadono-cho, Fushimi-ku, Kyoto-shi, Kyoto 6128501, JP
Inventors
  • 北村 俊彦 KITAMURA, Toshihiko; JP
Priority Data
2016-01294327.01.2016JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) WIRING SUBSTRATE, OPTICAL SEMICONDUCTOR ELEMENT PACKAGE, AND OPTICAL SEMICONDUCTOR DEVICE
(FR) SUBSTRAT DE CÂBLAGE, BOÎTIER D’ÉLÉMENT À SEMI-CONDUCTEUR OPTIQUE ET DISPOSITIF À SEMI-CONDUCTEUR OPTIQUE
(JA) 配線基板、光半導体素子パッケージおよび光半導体装置
Abstract
(EN)
This wiring substrate has signal conductor wiring positioned on a first surface of a first dielectric layer, and has a ground conductor layer positioned on a second surface thereof. When seen from a planar view, the ground conductor layer region where a first end section of the signal conductor wiring is positioned is notched inward from a first side of the second surface that corresponds to a first side of the first surface.
(FR)
Le substrat de câblage de l’invention comporte un câblage conducteur de signal positionné sur une première surface d’une première couche diélectrique, et comporte une couche conductrice de masse positionnée sur une deuxième surface de celle-ci. Vu depuis une vue en plan, la région de la couche conductrice de masse, au niveau de laquelle une première partie d’extrémité du câblage conducteur de signal est positionnée, est entaillée vers l’intérieur depuis un premier côté de la deuxième surface qui correspond à un premier côté de la première surface.
(JA)
配線基板は、第1誘電体層の第1面に信号導体配線が位置し、第2面に接地導体層が位置している。接地導体層において、平面視で信号導体配線の第1端部が位置する領域が、第1面の第1辺に対向する第2面の第1辺側から内方に切り欠かれている。
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