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1. (WO2017128765) PIXEL STRUCTURE AND METHOD FOR FABRICATING SAME, AND ARRAY SUBSTRATE AND DISPLAY DEVICE
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/128765 International Application No.: PCT/CN2016/101546
Publication Date: 03.08.2017 International Filing Date: 09.10.2016
IPC:
H01L 21/336 (2006.01) ,H01L 29/786 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
Applicants:
京东方科技集团股份有限公司 BOE TECHNOLOGY GROUP CO., LTD. [CN/CN]; 中国北京市 朝阳区酒仙桥路10号 No. 10 Jiuxianqiao Rd., Chaoyang District Beijing 100015, CN
合肥鑫晟光电科技有限公司 HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD. [CN/CN]; 中国安徽省合肥市 新站区工业园内 Xinzhan Industrial Park Hefei, Anhui 230012, CN
Inventors:
万云海 WAN, Yunhai; CN
杨成绍 YANG, Chengshao; CN
韩领 HAN, Ling; CN
宋博韬 SONG, Botao; CN
Agent:
北京天昊联合知识产权代理有限公司 TEE & HOWE INTELLECTUAL PROPERTY ATTORNEYS; 中国北京市 东城区建国门内大街28号民生金融中心D座10层陈源 Yuan Chen, 10th Floor, Tower D Minsheng Financial Center 28 Jianguomennei Avenue Dongcheng District, Beijing 100005, CN
Priority Data:
201610052345.026.01.2016CN
Title (EN) PIXEL STRUCTURE AND METHOD FOR FABRICATING SAME, AND ARRAY SUBSTRATE AND DISPLAY DEVICE
(FR) STRUCTURE DE PIXEL ET SON PROCÉDÉ DE FABRICATION, ET SUBSTRAT DE RÉSEAU AINSI QUE DISPOSITIF D'AFFICHAGE
(ZH) 像素结构及其制备方法、阵列基板和显示装置
Abstract:
(EN) Provided are a pixel structure and method for fabricating same, and an array substrate and display device. The method for fabricating the pixel structure comprises: a pixel structure comprising a dielectric layer and a metal layer; the fabrication method comprises: forming, in sequence on a transparent substrate (1), a dielectric layer (2) and a photoresist layer (3); using a back exposure process, exposing and developing the photoresist layer so as to form a groove in the photoresist layer, the area of the groove opening adjacent to the dielectric layer being greater than the area of the groove opening away from the dielectric layer; using an etching process to remove part of the dielectric material in the region of the dielectric layer exposed by means of the groove, so as to form a slotted hole in the dielectric layer; forming a metal layer (40) on the photoresist-layer side away from the dielectric layer, said metal layer being partially embedded in said slotted hole; using a lift-off process to remove the photoresist layer and part of the metal layer thereon, while retaining the part of the metal layer that is inside the slotted hole.
(FR) L'invention concerne une structure de pixel et son procédé de fabrication, et un substrat de réseau ainsi qu'un dispositif d'affichage. Le procédé de fabrication de la structure de pixel comprend : une structure de pixel comprenant une couche diélectrique et une couche métallique ; le procédé de fabrication consiste à : former, en séquence sur un substrat transparent (1), une couche diélectrique (2) et une couche de résine photosensible (3) ; à l'aide d'un procédé d'exposition dorsale, exposer et développer la couche de résine photosensible de façon à former une rainure dans la couche de résine photosensible, la surface de l'ouverture de rainure adjacente à la couche diélectrique étant supérieure à la surface de l'ouverture de rainure opposée à la couche diélectrique ; utiliser un procédé de gravure permettant de retirer une partie du matériau diélectrique dans la région de la couche diélectrique exposée par la rainure, de manière à former un trou oblong dans la couche diélectrique ; former une couche métallique (40) du côté couche de résine photosensible opposé à la couche diélectrique, ladite couche métallique étant partiellement intégrée dans ledit trou oblong ; utiliser un procédé de décollement permettant de retirer la couche de résine photosensible et une partie de la couche métallique sur celle-ci, tout en conservant la partie de la couche métallique qui est à l'intérieur du trou oblong.
(ZH) 一种像素结构及其制备方法、一种阵列基板和一种显示装置。该像素结构的制备方法包括:像素结构包括绝缘层和金属层,制备方法包括:在透明基板(1)上依次形成绝缘层(2)和光刻胶层(3);采用背曝光工艺对光刻胶层进行曝光、显影,以在光刻胶层中形成沟槽,沟槽的靠近绝缘层的开口面积大于其远离绝缘层的开口面积;采用刻蚀工艺去除绝缘层的通过沟槽暴露的区域的部分绝缘材料,以在绝缘层中形成槽孔;在光刻胶层的远离绝缘层的一侧形成金属层(40),该金属层的一部分嵌于所述槽孔内;采用剥离工艺去除光刻胶层及其上的金属层部分,保留所述槽孔内的金属层部分。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)
Also published as:
US20180059456