Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2017112222) DIGITAL DUTY CYCLE CORRECTION FOR FREQUENCY MULTIPLIER
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/112222 International Application No.: PCT/US2016/063151
Publication Date: 29.06.2017 International Filing Date: 21.11.2016
Chapter 2 Demand Filed: 21.10.2017
IPC:
H04L 7/033 (2006.01) ,H03K 5/156 (2006.01) ,H03L 7/197 (2006.01)
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
L
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
7
Arrangements for synchronising receiver with transmitter
02
Speed or phase control by the received code signals, the signals containing no special synchronisation information
033
using the transitions of the received signal to control the phase of the synchronising-signal- generating means, e.g. using a phase-locked loop
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
K
PULSE TECHNIQUE
5
Manipulating pulses not covered by one of the other main groups in this subclass
156
Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
L
AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
7
Automatic control of frequency or phase; Synchronisation
06
using a reference signal applied to a frequency- or phase-locked loop
16
Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
18
using a frequency divider or counter in the loop
197
a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
Applicants:
QUALCOMM INCORPORATED [US/US]; ATTN: International IP Administration 5775 Morehouse Drive San Diego, California 92121-1714, US
Inventors:
PARK, Dongmin; US
PARK, Jong Min; US
LEUNG, Lai Kan; US
Agent:
TOLER, JEFFREY G.; 8500 Bluffstone Cove Suite A201 Austin, Texas 78759, US
MOORE, JASON L.; 8500 Bluffstone Cove Suite A201 Austin, TX 78759, US
MOORE, Jason, L.; 8500 Bluffstone Cove, Suite A201 Austin, TX 78759, US
Priority Data:
15/153,49612.05.2016US
62/387,33423.12.2015US
Title (EN) DIGITAL DUTY CYCLE CORRECTION FOR FREQUENCY MULTIPLIER
(FR) CORRECTION DE CYCLE DE SERVICE NUMÉRIQUE POUR UN MULTIPLICATEUR DE FRÉQUENCE
Abstract:
(EN) An apparatus includes a phase detector coupled to an output of a frequency multiplier. A digital loop filter is coupled to the phase detector, and a duty cycle correction circuit is coupled to the digital loop filter.
(FR) Un appareil comprend un détecteur de phase couplé à une sortie d'un multiplicateur de fréquence. Un filtre à boucle numérique est couplé au détecteur de phase, et un circuit de correction de cycle de service est couplé au filtre à boucle numérique.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)