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1. (WO2017112198) ARCHITECTURE FOR SOFTWARE DEFINED INTERCONNECT SWITCH
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/112198 International Application No.: PCT/US2016/062968
Publication Date: 29.06.2017 International Filing Date: 20.11.2016
IPC:
G06F 15/173 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
15
Digital computers in general; Data processing equipment in general
16
Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
163
Interprocessor communication
173
using an interconnection network, e.g. matrix, shuffle, pyramid, star or snowflake
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054-1549, US
Inventors:
HARRIMAN, David J.; US
KULKARNI, Manjari; US
PETHE, Akshay G.; US
STALLEY, Sean O.; US
WAGH, Mahesh; US
DAS SHARMA, Debendra; US
Agent:
MCCLELLAND, R. Scott; US
Priority Data:
14/978,17922.12.2015US
Title (EN) ARCHITECTURE FOR SOFTWARE DEFINED INTERCONNECT SWITCH
(FR) ARCHITECTURE DESTINÉE À UN COMMUTATEUR D'INTERCONNEXION DÉFINI PAR LOGICIEL
Abstract:
(EN) An interconnect switch is provided including switching logic executable to facilitate a Peripheral Component Interconnect Express (PCIe)-based interconnect, and further including a control host embedded in the switch to provide one or more enhanced routing capabilities. The control host includes a processor device, memory, and software executable by the processor device to process traffic received at one or more ports of the switch to redirect at least a portion of the traffic to provide the one or more enhanced routing capabilities.
(FR) L'invention concerne un commutateur d'interconnexion comprenant une logique de commutation exécutable afin de faciliter une interconnexion basée sur une interconnexion de composants périphériques express (PCIe), et comprenant en outre un hôte de commande intégré dans le commutateur afin de fournir une ou plusieurs capacité(s) de routage améliorée(s). L'hôte de commande comprend un dispositif processeur, une mémoire, et un logiciel exécutable par le dispositif processeur afin de traiter le trafic reçu au niveau d'un ou plusieurs port(s) du commutateur de manière à rediriger au moins une partie du trafic dans le but de fournir ladite ou lesdites capacité(s) de routage améliorée(s).
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
CN108337910DE112016005910