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1. (WO2017112098) SECURE ROUTING OF TRUSTED SOFTWARE TRANSACTIONS IN UNSECURE FABRIC
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/112098 International Application No.: PCT/US2016/060065
Publication Date: 29.06.2017 International Filing Date: 02.11.2016
IPC:
G06F 21/72 (2013.01) ,G06F 21/60 (2013.01) ,G06F 21/50 (2013.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
21
Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
70
Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
71
to assure secure computing or processing of information
72
in cryptographic circuits
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
21
Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
60
Protecting data
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
21
Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
50
Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054, US
Inventors:
ELBAZ, Reouven; US
CHHABRA, Siddhartha; US
MCGOWAN, Steven B.; US
Agent:
PERDOK, Monique, M.; US
Priority Data:
14/757,38723.12.2015US
Title (EN) SECURE ROUTING OF TRUSTED SOFTWARE TRANSACTIONS IN UNSECURE FABRIC
(FR) ACHEMINEMENT SÉCURISÉ DE TRANSACTIONS LOGICIELLES DE CONFIANCE DANS UNE MATRICE NON SÉCURISÉE
Abstract:
(EN) Various configurations and methods for securing and validating trusted input output (IO) data communications within fabric interconnects of processing circuitry are disclosed herein. As an example, a technique for secure routing of trusted software transactions includes operations of a crypto engine and an IO hub to validate trusted transactions such as DMA read and write transactions received from a trusted IO controller, and configuring the fabrics of the circuitry to prevent re-routing or tampering of data from the trusted transactions. In an example, hardware-based identification and verification of the trusted transactions may be performed with use of content addressable memory at the crypto engine and the respective unsecure fabrics, to identify and enforce the trusted transactions that cannot be re-routed. As a result, rogue agents or entities connected to the unsecure fabrics cannot interfere with or intercept data for trusted transactions.
(FR) L'invention concerne plusieurs configurations et procédés de sécurisation et de validation de communication de données entrée sortie (IO) de confiance dans des interconnexions de matrice d'un circuit de traitement. Une technique donnée à titre d'exemple pour l'acheminement sécurisé de transactions logicielles de confiance comprend des opérations d'un moteur de chiffrement et d'un concentrateur IO pour la validation de transactions de confiance telles que des transactions de lecture et d'écriture DMA reçues d'un contrôleur IO de confiance et la configuration des matrices du circuit pour empêcher le ré-acheminement ou l'altération de données provenant des transactions sécurisées. Dans un exemple, une identification et une vérification matérielles des transactions sécurisées peuvent être effectuées à l'aide d'une mémoire adressable par le contenu au niveau du moteur de chiffrement et des matrices non sécurisées respectives afin d'identifier et d'appliquer les transactions de confiance qui ne peuvent pas être ré-acheminées. Ainsi, des agents ou des entités illégales, connectées aux matrices non sécurisées, ne peuvent pas intercepter ou porter atteinte à des données pour des transactions de confiance.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)