Search International and National Patent Collections
Some content of this application is unavailable at the moment.
If this situation persists, please contact us atFeedback&Contact
1. (WO2017111869) TRANSITION METAL DICHALCOGENIDES (TMDCS) OVER III-NITRIDE HETEROEPITAXIAL LAYERS
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/111869 International Application No.: PCT/US2015/000493
Publication Date: 29.06.2017 International Filing Date: 24.12.2015
IPC:
H01L 21/822 (2006.01) ,H01L 21/8258 (2006.01) ,H01L 21/8252 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
8258
the substrate being a semiconductor, using a combination of technologies covered by H01L21/822, H01L21/8252, H01L21/8254 or H01L21/8256204
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
8252
the substrate being a semiconductor, using III-V technology
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Blvd. Santa Clara, CA 95054, US
Inventors:
DASGUPTA, Sansaptak; US
THEN, Han, Wui; US
RADOSAVLJEVIC, Marko; US
MUKHERJEE, Niloy; US
PILLARISETTY, Ravi; US
Agent:
HOWARD, James, M.; US
Priority Data:
Title (EN) TRANSITION METAL DICHALCOGENIDES (TMDCS) OVER III-NITRIDE HETEROEPITAXIAL LAYERS
(FR) DICHALCOGÉNURES DE MÉTAUX DE TRANSITION (TMDC) SUR COUCHES HÉTÉROÉPITAXIALES DE NITRURES DU GROUPE III
Abstract:
(EN) Described herein are methods and structures integrating one or more TMDC crystal heteroepitaxially grown on one or more group Ill-Nitride (III-N) crystal. The TMDC crystal may be grown on a III-N heteroepitaxial crystal that has been grown on crystalline silicon substrate. One or more of III-N devices and silicon devices employing separated regions of the heteroepitaxial substrate may be integrated with a TMDC device fabricated on with the TMDC crystal. In some embodiments, impurity-doped III-N source/drain regions provide a low resistance coupling between metallization and a TMDC-channeled transistor.
(FR) L'invention concerne des procédés et des structures intégrant un ou plusieurs cristaux de dichalcogénures de métaux de transition (TMDC) obtenus par croissance hétéroépitaxiale sur un ou plusieurs cristaux de nitrures du groupe III (III-N). On peut faire croître le cristal TMDCsur un cristal hétéroépitaxial III-N dont la croissance a été réalisée sur un substrat en silicium cristallin. Des dispositifs III-N et/ou des dispositifs au silicium utilisant des régions séparées du substrat hétéroépitaxial peuvent être intégrés avec un dispositif TMDC réalisé avec le cristal TMDC. Dans certains modes de réalisation, des zones de source/drain III-N dopées avec des impuretés assurent un couplage à faible résistance entre une métallisation et un transistor à canal TMDC.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
US20180350921