Some content of this application is unavailable at the moment.
If this situation persists, please contact us atFeedback&Contact
1. (WO2017110808) WIRING STRUCTURE, METHOD FOR MANUFACTURING SAME, AND ELECTRONIC DEVICE
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/110808 International Application No.: PCT/JP2016/087954
Publication Date: 29.06.2017 International Filing Date: 20.12.2016
IPC:
H05K 3/10 (2006.01) ,H01L 23/12 (2006.01) ,H05K 3/46 (2006.01)
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3
Apparatus or processes for manufacturing printed circuits
10
in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
12
Mountings, e.g. non-detachable insulating substrates
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3
Apparatus or processes for manufacturing printed circuits
46
Manufacturing multi-layer circuits
Applicants:
大日本印刷株式会社 DAI NIPPON PRINTING CO., LTD. [JP/JP]; 東京都新宿区市谷加賀町一丁目一番一号 1-1-1, Ichigaya Kagacho, Shinjuku-ku, Tokyo 1628001, JP
Inventors:
細田 哲史 HOSODA Tetsushi; JP
古川 正 FURUKAWA Tadashi; JP
古堅 亮 FURUGEN Ryo; JP
古瀬 綾子 FURUSE Ayako; JP
外田 鉄兵 SOTODA Teppei; JP
有吉 絢子 ARIYOSHI Junko; JP
Agent:
特許業務法人高橋・林アンドパートナーズ TAKAHASHI, HAYASHI AND PARTNER PATENT ATTORNEYS, INC.; 東京都大田区蒲田5-24-2 損保ジャパン日本興亜蒲田ビル9階 Sonpo Japan Nipponkoa Kamata Building 9F, 5-24-2 Kamata, Ota-ku, Tokyo 1440052, JP
Priority Data:
2015-25088424.12.2015JP
2016-13722312.07.2016JP
Title (EN) WIRING STRUCTURE, METHOD FOR MANUFACTURING SAME, AND ELECTRONIC DEVICE
(FR) STRUCTURE DE CÂBLAGE, SON PROCÉDÉ DE FABRICATION, ET DISPOSITIF ÉLECTRONIQUE
(JA) 配線構造体とその製造方法および電子装置
Abstract:
(EN) The purpose of the present invention is to provide an exceptionally reliable wiring structure, a method for easily manufacturing a wiring structure of such description, and an electronic device in which the wiring structure is used. According to one embodiment of the present invention, there is provided a wiring structure having: a first insulation layer that has a concave portion in a first surface; a first conductor layer positioned in the concave portion, the first conductor layer protruding from the first surface; a conductor barrier layer interposed between the first conductor layer and the first insulation layer; and a second insulation layer positioned on the first surface.
(FR) Le but de la présente invention est de pourvoir à une structure de câblage remarquablement fiable, à un procédé pour fabriquer facilement une structure de câblage telle que décrite ici, et à un dispositif électronique dans lequel la structure de câblage est utilisée. Selon un mode de réalisation de la présente invention, une structure de câblage est décrite qui comprend : une première couche isolante qui comporte une partie concave dans une première surface; une première couche conductrice positionnée dans la partie concave, la première couche conductrice dépassant de la première surface; une couche barrière conductrice intercalée entre la première couche conductrice et la première couche isolante; et une seconde couche isolante positionnée sur la première surface.
(JA) 信頼性に優れる配線構造体と、このような配線構造体を簡便に製造する方法と、配線構造体を用いた電子装置とを提供することを目的とする。本発明の一実施形態によると、第1の面に凹部を有する第1の絶縁層と、凹部に位置し、第1の面から突出している第1の導体層と、第1の導体層と第1の絶縁層との間に介在する導体バリア層と、第1の面上に位置する第2の絶縁層と、を有する配線構造体が提供される。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)