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1. (WO2017110657) PHASE SYNCHRONIZATION CIRCUIT, RF FRONT - END CIRCUIT, RADIO TRANSMISSION/RECEPTION CIRCUIT, AND MOBILE RADIO COMMUNICATION TERMINAL APPARATUS
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/110657 International Application No.: PCT/JP2016/087454
Publication Date: 29.06.2017 International Filing Date: 15.12.2016
IPC:
H03L 7/06 (2006.01) ,H03B 5/30 (2006.01) ,H03B 21/01 (2006.01) ,H03L 7/16 (2006.01) ,H04B 1/403 (2015.01)
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
L
AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
7
Automatic control of frequency or phase; Synchronisation
06
using a reference signal applied to a frequency- or phase-locked loop
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
B
GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
5
Generation of oscillations using amplifier with regenerative feedback from output to input
30
with frequency-determining element being electromechanical resonator
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
B
GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
21
Generation of oscillations by combining unmodulated signals of different frequencies
01
by beating unmodulated signals of different frequencies
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
L
AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
7
Automatic control of frequency or phase; Synchronisation
06
using a reference signal applied to a frequency- or phase-locked loop
16
Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
[IPC code unknown for H04B 1/403]
Applicants:
アール・エフ・アーキテクチャ株式会社 R.F.ARCHITECTURE CO., LTD. [JP/JP]; 東京都港区赤坂三丁目2番6号 3-2-6 Akasaka, Minato-ku Tokyo 1070052, JP
Inventors:
森榮 真一 MORISAKA Shinichi; JP
Agent:
特許業務法人にじいろ特許事務所 SEVEN COLOR PATENT FIRM; 東京都千代田区神田須田町1丁目26番 ラシーヌ神田ビル5F 5F RACINE KANDA Bldg. 1-26 Kanda-Sudacho, Chiyoda-ku Tokyo 1010041, JP
Priority Data:
2015-25086424.12.2015JP
Title (EN) PHASE SYNCHRONIZATION CIRCUIT, RF FRONT - END CIRCUIT, RADIO TRANSMISSION/RECEPTION CIRCUIT, AND MOBILE RADIO COMMUNICATION TERMINAL APPARATUS
(FR) CIRCUIT DE SYNCHRONISATION DE PHASE, CIRCUIT FRONTAL RF, CIRCUIT D'ÉMISSION/RÉCEPTION RADIO, ET APPAREIL TERMINAL DE RADIOCOMMUNICATION MOBILE
(JA) 位相同期回路、RFフロントエンド回路、無線送受信回路、携帯型無線通信端末装置
Abstract:
(EN) The objective of the invention is to provide a phase synchronization circuit wherein even if the frequency of an input signal becomes unstable, the frequency can be stabilized. A phase synchronization circuit 12 that corrects an error between the frequency of an output signal LSraw of an oscillator and a predetermined target frequency is characterized by comprising: an ADC 121 that performs an A/D conversion of the output signal LSraw; a reference frequency output means 123 that outputs a reference frequency signal Sref; an error frequency detection means 122a that receives the A/D converted output signal LSraw and the reference frequency signal Sref and calculates an error between the frequency of the output signal LSraw and the target frequency; a correction signal generation means 122b that generates an error correction signal LSerr on the basis of the error; a DAC 124 that performs a D/A conversion of the error correction signal LSerr; and a multiplier 125 that multiplies the output signal LSraw by the D/A converted error correction signal LSerr.
(FR) L'objectif de l'invention est de pourvoir à un circuit de synchronisation de phase dans lequel, même si la fréquence d'un signal d'entrée devient instable, la fréquence puisse être stabilisée. Un circuit de synchronisation de phase (12) selon l'invention, qui corrige une erreur entre la fréquence d'un signal de sortie LSraw d'un oscillateur et une fréquence cible prédéterminée, est caractérisé en ce qu'il comprend : un convertisseur analogique-numérique (CAN) (121) qui effectue une conversion A/N du signal de sortie LSraw; un moyen de délivrance de fréquence de référence (123) qui délivre un signal de fréquence de référence Sref; un moyen de détection d'erreur de fréquence (122a) qui reçoit le signal de sortie LSraw converti A/N et le signal de fréquence de référence Sref et calcule une erreur entre la fréquence du signal de sortie LSraw et la fréquence cible; un moyen de génération de signal de correction (122b) qui génère un signal de correction d'erreur LSerr en fonction de l'erreur; un convertisseur numérique-analogique (CNA) (124) qui effectue une conversion numérique-analogique du signal de correction d'erreur LSerr; et un multiplicateur (125) qui multiplie le signal de sortie LSraw par le signal de correction d'erreur LSerr ayant subi une conversion numérique-analogique.
(JA) 入力信号の周波数が不安定となる場合においても、それを安定化することができる、位相同期回路を提供すること。 発振器の出力信号LSrawの周波数と、予め定められた目標周波数との誤差を補正する位相同期回路12であって、出力信号LSrawのA/D変換を行うADC121と、基準周波数信号Srefを出力する基準周波数出力手段123と、A/D変換された出力信号LSrawと、基準周波数信号Srefの入力を受け、出力信号LSrawの周波数と前記目標周波数との誤差を算出する誤差周波数検出手段122aと、前記誤差に基づいて、誤差補正用信号LSerrを生成する補正用信号生成手段122bと、誤差補正用信号LSerrのD/A変換を行うDAC124と、出力信号LSrawとD/A変換された誤差補正用信号LSerrとの乗算を行う乗算器125と、を備えることを特徴とする。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)
Also published as:
US20170310459CN108432139