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1. (WO2017110619) DEVICE FOR CONTROLLING PACKET TRANSFER DEVICE THAT HAS MULTI-CORE CPU, AND COMPUTER-READABLE STORAGE MEDIUM
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/110619 International Application No.: PCT/JP2016/087229
Publication Date: 29.06.2017 International Filing Date: 14.12.2016
IPC:
G06F 9/50 (2006.01) ,H04L 12/775 (2013.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
9
Arrangements for programme control, e.g. control unit
06
using stored programme, i.e. using internal store of processing equipment to receive and retain programme
46
Multiprogramming arrangements
50
Allocation of resources, e.g. of the central processing unit (CPU)
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
L
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
12
Data switching networks
70
Packet switching systems
701
Routing or path finding
771
Router architecture
775
multiple routing entities, e.g. multiple software or hardware instances
Applicants:
KDDI株式会社 KDDI CORPORATION [JP/JP]; 東京都新宿区西新宿二丁目3番2号 3-2, Nishi-Shinjuku 2-chome, Shinjuku-ku, Tokyo 1638003, JP
Inventors:
スクソブーン カリカ SUKSOMBOON, Kaliki; JP
林 通秋 HAYASHI, Michiaki; JP
福嶋 正機 FUKUSHIMA, Masaki; JP
岡本 修一 OKAMOTO, Shuichi; JP
Agent:
大塚 康徳 OHTSUKA, Yasunori; JP
大塚 康弘 OHTSUKA, Yasuhiro; JP
高柳 司郎 TAKAYANAGI, Jiro; JP
木村 秀二 KIMURA, Shuji; JP
Priority Data:
2015-24896221.12.2015JP
Title (EN) DEVICE FOR CONTROLLING PACKET TRANSFER DEVICE THAT HAS MULTI-CORE CPU, AND COMPUTER-READABLE STORAGE MEDIUM
(FR) DISPOSITIF DE CONTRÔLE D'UN DISPOSITIF DE TRANSFERT DE PAQUETS COMPORTANT UNE UNITÉ CENTRALE DE TRAITEMENT (UCT) MULTICOEUR, ET SUPPORT DE STOCKAGE LISIBLE PAR ORDINATEUR
(JA) マルチコアCPUを有するパケット転送装置の制御装置及びコンピュータ可読記憶媒体
Abstract:
(EN) A control device for performing a control, within cores belonging to a computer provided with a multi-core CPU, for configuring the computer by determining the number of cores allocated to a packet transfer process is provided with: a holding means for holding a target range for the throughput of packet transfer; an estimation means for estimating the maximum throughput for when N cores (where N is an integer of 2 or greater) are allocated to the packet transfer process on the basis of the number of reference cycles required in a process for transferring one reference packet when only one core is allocated to the packet transfer process; and an allocating means for determining the number N at which the maximum throughput is within the target range and controlling the computer so that the determined number of cores is allocated to the packet transfer process.
(FR) Le dispositif de contrôle comprend: un moyen de maintien pour maintenir une plage cible pour le débit de transfert de paquets; un moyen d'estimation pour estimer le débit maximal pour l'instant où N coeurs (N étant un entier égal ou supérieur à 2) sont attribués au processus de transfert de paquets sur la base du nombre de cycles de référence requis dans un processus de transfert d'un paquet de référence, lorsqu'un seul coeur est attribué au processus de transfert de paquets; et un moyen d'attribution pour déterminer le nombre N auquel le débit maximal se trouve dans la plage cible, et pour contrôler l'ordinateur de sorte que le nombre de coeurs déterminé soit attribué au processus de transfert de paquets.
(JA) マルチコアCPUを備えたコンピュータが有するコアの内、パケット転送処理に割り当てるコア数を決定して当該コンピュータを構成する制御を行う制御装置は、パケット転送のスループットの目標範囲を保持する保持手段と、1つのコアのみをパケット転送処理に割り当てたときに、1つの基準パケットの転送処理に必要な基準サイクル数に基づき、N個(Nは2以上の整数)のコアをパケット転送処理に割り当てたときの最大スループットを推定する推定手段と、前記最大スループットが前記目標範囲内になるNの数を求め、前記求めた数のコアがパケット転送処理に割り当てられる様に前記コンピュータを制御する割り当て手段と、を備えている。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)