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1. (WO2017110555) CURRENT SOURCE CIRCUIT
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/110555 International Application No.: PCT/JP2016/086909
Publication Date: 29.06.2017 International Filing Date: 12.12.2016
IPC:
G05F 3/26 (2006.01) ,H03F 3/45 (2006.01)
G PHYSICS
05
CONTROLLING; REGULATING
F
SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
3
Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
02
Regulating voltage or current
08
wherein the variable is dc
10
using uncontrolled devices with non-linear characteristics
16
being semiconductor devices
20
using diode-transistor combinations
26
Current mirrors
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
F
AMPLIFIERS
3
Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
45
Differential amplifiers
Applicants:
SIMPLEX QUANTUM株式会社 SIMPLEX QUANTUM INC. [JP/JP]; 東京都港区高輪3-4-13 レフォルマ高輪6F Reforma Takanawa 6F, 3-4-13, Takanawa, Minato-ku, Tokyo 1080074, JP
Inventors:
渡邉 喜隆 WATANABE, Yoshitaka; JP
Agent:
稲葉 良幸 INABA, Yoshiyuki; JP
大貫 敏史 ONUKI, Toshifumi; JP
Priority Data:
2015-25508425.12.2015JP
Title (EN) CURRENT SOURCE CIRCUIT
(FR) CIRCUIT DE SOURCE DE COURANT
(JA) 電流源回路
Abstract:
(EN) Provided is a current source circuit which is capable of supplying a reference current that is stable with respect to power supply voltage fluctuations. This current source circuit is provided with: first and second transistors having emitters to which a power supply voltage is supplied; a third transistor which is diode-connected and has a collector that is connected to a collector of the first transistor; a fourth transistor which is current mirror connected to the third transistor and has a collector that is connected to a collector of the second transistor and an emitter that is grounded; first and second resistors which are arranged between an emitter of the third transistor and the ground and are connected in series; and a fifth transistor which has a base that is connected to the collector of the second transistor and an emitter that is connected between the first and second resistors.
(FR) L'invention concerne un circuit de source de courant qui est susceptible de fournir un courant de référence qui est stable par rapport à des variations de tension de l'alimentation électrique. Ce circuit de source de courant est doté de : premier et deuxième transistors comportant des émetteurs auxquels est fournie une tension d'alimentation électrique ; un troisième transistor qui est connecté par diode et possède un collecteur connecté à un collecteur du premier transistor ; un quatrième transistor qui est connecté en miroir de courant au troisième transistor et possède un collecteur qui est connecté à un collecteur du deuxième transistor et un émetteur qui est connecté à la masse ; des première et seconde résistances disposées entre un émetteur du troisième transistor et la masse et qui sont connectées en série ; et un cinquième transistor qui possède une base qui est connectée au collecteur du deuxième transistor et un émetteur qui est connecté entre les première et seconde résistances.
(JA) 電源電圧の変動に対して安定した基準電流を供給可能な電流源回路を提供する。 エミッタに電源電圧が供給される第1及び第2トランジスタと、ダイオード接続され、コレクタが第1トランジスタのコレクタに接続された第3トランジスタと、第3トランジスタとカレントミラー接続され、コレクタが第2トランジスタのコレクタに接続され、エミッタが接地された第4トランジスタと、第3トランジスタのエミッタと接地との間に設けられ、直列に接続された第1及び第2抵抗器と、ベースが第2トランジスタのコレクタに接続され、エミッタが第1及び第2抵抗器の間に接続された第5トランジスタと、を備える。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)