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1. (WO2017105524) SUPERCONDUCTING BUMP BONDS
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/105524 International Application No.: PCT/US2015/068082
Publication Date: 22.06.2017 International Filing Date: 30.12.2015
Chapter 2 Demand Filed: 13.10.2017
IPC:
H01L 27/18 (2006.01) ,H01L 23/498 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
18
including components exhibiting superconductivity
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
488
consisting of soldered or bonded constructions
498
Leads on insulating substrates
Applicants:
GOOGLE LLC [US/US]; 1600 Amphitheatre Parkway Mountain View, California 94043, US
MUTUS, Joshua Yousouf [US/US]; US
LUCERO, Erik Anthony [US/US]; US
Inventors:
MUTUS, Joshua Yousouf; US
LUCERO, Erik Anthony; US
Agent:
VALENTINO, Joseph; US
Priority Data:
62/267,82415.12.2015US
Title (EN) SUPERCONDUCTING BUMP BONDS
(FR) LIAISONS À BOSSE SUPRACONDUCTRICES
Abstract:
(EN) A device (100) includes a first chip (104) having a first circuit element (112), a first interconnect pad (116) in electrical contact (118) with the first circuit element, and a barrier layer (120) on the first interconnect pad, a superconducting bump bond (106) on the barrier layer, and a second chip (102) joined to the first chip by the superconducting bump bond, the second chip having a quantum circuit element (108), in which the superconducting bump bond provides an electrical connection between the first circuit element and the quantum circuit element.
(FR) Un dispositif (100) comprend une première puce (104) ayant un premier élément de circuit (112), une première plage d'interconnexion (116) en contact électrique (118) avec le premier élément de circuit, et une couche barrière (120) sur la première plage d'interconnexion, une liaison à bosse supraconductrice (106) sur la couche barrière, et une seconde puce (102) jointe à la première puce par la liaison à bosse supraconductrice, la seconde puce ayant un élément de circuit quantique (108), la liaison à bosse supraconductrice établissant une connexion électrique entre le premier élément de circuit et l'élément de circuit quantique.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
CA3008825AU2015417766IN201847025509SG11201805152UEP3391415KR1020180122596
US20180366634CN109075186