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1. (WO2017096781) NANOWIRE SEMICONDUCTOR DEVICE PROVIDED WITH HIGH QUALITY EPITAXIAL LAYER, AND MANUFACTURING METHOD FOR NANOWIRE SEMICONDUCTOR DEVICE
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/096781 International Application No.: PCT/CN2016/087251
Publication Date: 15.06.2017 International Filing Date: 27.06.2016
IPC:
H01L 29/78 (2006.01) ,H01L 21/336 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
Applicants:
中国科学院微电子研究所 INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES [CN/CN]; 中国北京市 朝阳区北土城西路3号 No.3 Beitucheng West Road, Chaoyang District Beijing 100029, CN
Inventors:
朱慧珑 ZHU, Huilong; US
Agent:
中科专利商标代理有限责任公司 CHINA SCIENCE PATENT & TRADEMARK AGENT LTD.; 中国北京市 海淀区西三环北路87号4-1105室 Suite 4-1105, No. 87, West 3rd Ring North Rd., Haidian District Beijing 100089, CN
Priority Data:
201510888321.407.12.2015CN
201610440133.X17.06.2016CN
Title (EN) NANOWIRE SEMICONDUCTOR DEVICE PROVIDED WITH HIGH QUALITY EPITAXIAL LAYER, AND MANUFACTURING METHOD FOR NANOWIRE SEMICONDUCTOR DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEUR À NANOFILS DOTÉ D'UNE COUCHE ÉPITAXIALE DE HAUTE QUALITÉ, ET PROCÉDÉ DE FABRICATION DE DISPOSITIF À SEMI-CONDUCTEUR À NANOFILS
(ZH) 具有高质量外延层的纳米线半导体器件及其制造方法
Abstract:
(EN) A nanowire semiconductor device provided with a high quality epitaxial layer, and a manufacturing method for the nanowire semiconductor device. The semiconductor device may comprise: a substrate (1001); at least one nanowire (1005-1, 1005-2) separated from the substrate (1001), the nanowire (1005-1, 1005-2) extending along a curved longitudinal extension direction; at least one semiconductor layer (1023), respectively formed around the outer periphery of each nanowire (1005-1, 1005-2) to at least partially surround the corresponding nanowire (1005-1, 1005-2), the semiconductor layers (1023) formed around each nanowire (1005-1, 1005-2) being separate from one another.
(FR) L'invention concerne un dispositif à semi-conducteur à nanofils doté d'une couche épitaxiale de haute qualité, et un procédé de fabrication du dispositif à semi-conducteur à nanofils. Le dispositif à semi-conducteur peut comprendre : un substrat (1001) ; au moins un nanofil (1005-1, 1005-2) séparé du substrat (1001), le nanofil (1005-1, 1005-2) s'étendant le long d'une direction d'extension longitudinale incurvée ; au moins une couche semi-conductrice (1023), respectivement formée autour de la périphérie externe de chaque nanofil (1005-1, 1005-2) pour entourer au moins partiellement le nanofil (1005-1, 1005-2) correspondant, les couches semi-conductrices (1023) formées autour de chaque nanofil (1005-1, 1005-2) étant séparées les unes des autres.
(ZH) 一种具有高质量外延层的纳米线半导体器件及其制造方法。半导体器件可以包括:衬底(1001);与衬底(1001)相隔开的至少一条纳米线(1005-1、1005-2),其中该纳米线(1005-1、1005-2)沿弯曲的纵向延伸方向延伸;至少一个半导体层(1023),分别绕各纳米线(1005-1、1005-2)外周形成以至少部分环绕相应纳米线(1005-1、1005-2),且绕各纳米线(1005-1、1005-2)形成的各半导体层(1023)彼此分离。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)
Also published as:
US20180277682