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1. (WO2017096626) METHOD FOR FORMING GATE DIELECTRIC ON GRAPHENE SURFACE AND PRODUCING TRANSISTOR
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/096626 International Application No.: PCT/CN2015/097200
Publication Date: 15.06.2017 International Filing Date: 11.12.2015
IPC:
H01L 21/31 (2006.01) ,C23C 16/40 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
C CHEMISTRY; METALLURGY
23
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
C
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
16
Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes
22
characterised by the deposition of inorganic material, other than metallic material
30
Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
40
Oxides
Applicants:
华为技术有限公司 HUAWEI TECHNOLOGIES CO., LTD. [CN/CN]; 中国广东省深圳市 龙岗区坂田华为总部办公楼 Huawei Administration Building Bantian, Longgang District Shenzhen, Guangdong 518129, CN
Inventors:
梁晨 LIANG, Chen; CN
张臣雄 ZHANG, Chen-Xiong; CN
Agent:
北京中博世达专利商标代理有限公司 BEIJING ZBSD PATENT & TRADEMARK AGENT LTD.; 中国北京市 海淀区交大东路31号11号楼8层 8F, Building 11 No. 31 Jiaoda East Road,Haidian District Beijing 100044, CN
Priority Data:
Title (EN) METHOD FOR FORMING GATE DIELECTRIC ON GRAPHENE SURFACE AND PRODUCING TRANSISTOR
(FR) PROCÉDÉ PERMETTANT DE FORMER UN DIÉLECTRIQUE DE GRILLE SUR UNE SURFACE DE GRAPHÈNE ET DE PRODUIRE UN TRANSISTOR
(ZH) 一种在石墨烯表面形成栅介质层及制备晶体管的方法
Abstract:
(EN) This invention discloses a method for forming a gate dielectric on the surface of graphene and producing a field effect transistor and relates to the field of electronic device technology, wherein a large area of high quality, uniform gate dielectric layer is formed. The method comprises the following: allowing the graphene surface to absorb a hydrophilic volatile gase; placing the substrate on which graphene is formed in an ALD reaction chamber and injecting water vapor to be absorbed by the hydrophilic volatile gas on the surface of the graphene surface; raising the temperature of the ALD reaction chamber to a predetermined temperature then injecting the gate dielectric source gas to allow said vapor and gate dielectric source gas to react, producing a monolayer of a gate dielectric layer and allowing the hydrophilic volatile gas to evaporate; and repeating the process of injecting water vapor and the gate dielectric source gas into the ALD reaction chamber to form multiple monolayers of a gate dielectric layer, thereby forming a gate dielectric layer. The method is used in fabricating FETs.
(FR) La présente invention concerne un procédé permettant de former un diélectrique de grille sur une surface de graphène et de produire un transistor à effet de champ et se rapporte au domaine de la technologie de dispositif électronique, selon laquelle une grande superficie de couche diélectrique de grille uniforme de haute qualité est formée. Le procédé comprend les étapes suivantes consistant à : permettre à la surface de graphène d'absorber un gaz volatil hydrophile ; placer le substrat sur lequel du graphène est formé, dans une chambre de réaction de dépôt de couches atomiques (ALD pour Atomic Layer Deposition) et injecter de la vapeur d'eau qui doit être absorbée par le gaz volatil hydrophile sur la surface de la surface de graphène ; élever la température de la chambre de réaction de dépôt de couches atomiques à une température prédéterminée, injecter ensuite le gaz de source de diélectrique de grille pour permettre à ladite vapeur et au dit gaz de source de diélectrique de grille de réagir, produire une monocouche d'une couche diélectrique de grille et permettre au gaz volatil hydrophile de s'évaporer ; et répéter le processus d'injection de la vapeur d'eau et du gaz de source de diélectrique de grille dans la chambre de réaction de dépôt de couches atomiques afin de former de multiples monocouches d'une couche diélectrique de grille, ce qui permet de former une couche diélectrique de grille. Le procédé est utilisé dans la fabrication de transistors à effet de champ (FET pour Field Effect Transistor).
(ZH) 提供了一种在石墨烯表面形成栅介质层及制备FET的方法,涉及电子元器件技术领域,可在石墨烯表面形成大面积均匀高质量的栅介质层。该方法包括:使石墨烯的表面吸附亲水易挥发气体;将形成有石墨烯的衬底置于ALD反应腔中,通入水蒸气,以使吸附在石墨烯表面的亲水易挥发气体吸附所述水蒸气;将ALD反应腔的温度升到预定温度,通入栅介质源气体,使所述水蒸汽和栅介质源气体发生反应,生成栅介质层的一个单层,并使所述亲水易挥发气体挥发;重复在所述ALD反应腔中通入水蒸气以及栅介质源气体,以形成所述栅介质层的其他单层,形成所述栅介质层。用于制备FET。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)
Also published as:
CN108369910