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1. (WO2017092279) IGBT REAR SURFACE MANUFACTURING METHOD AND IGBT STRUCTURE
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/092279 International Application No.: PCT/CN2016/085835
Publication Date: 08.06.2017 International Filing Date: 15.06.2016
IPC:
H01L 21/331 (2006.01) ,H01L 29/739 (2006.01) ,H01L 29/06 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
328
Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors
33
the devices comprising three or more electrodes
331
Transistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
70
Bipolar devices
72
Transistor-type devices, i.e. able to continuously respond to applied control signals
739
controlled by field effect
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
Applicants:
株洲中车时代电气股份有限公司 ZHUZHOU CCR TIMES ELECTRIC CO., LTD. [CN/CN]; 中国湖南省株洲市 石峰区时代路169号 NO.169 Shidai Road, Shifeng District Zhuzhou, Hunan 412001, CN
Inventors:
肖海波 XIAO, Haibo; CN
罗海辉 LUO, Haihui; CN
刘国友 LIU, Guoyou; CN
Agent:
北京聿宏知识产权代理有限公司 YUHONG INTELLECTUAL PROPERTY LAW FIRM; 中国北京市 西城区宣武门外大街6号庄胜广场第一座西翼713室刘华联/刘建军 LIU Hualian/LIU Jianjun West Wing, Suite 713, One Junefield Plaza, 6 Xuanwumenwai Street, Xicheng District Beijing 100052, CN
Priority Data:
201510849344.430.11.2015CN
Title (EN) IGBT REAR SURFACE MANUFACTURING METHOD AND IGBT STRUCTURE
(FR) PROCÉDÉ DE FABRICATION DE SURFACE ARRIÈRE IGBT, ET STRUCTURE IGBT
(ZH) IGBT背面制作方法及IGBT结构
Abstract:
(EN) Provided are an insulated gate bipolar transistor (IGBT) rear surface manufacturing method and an IGBT structure, comprising: sequentially depositing a first semiconductor thin-film layer (2) and a dielectric layer onto a first rear surface (1), retaining only the first semiconductor thin-film layer (1) and the dielectric layer of a first area, then depositing a second semiconductor thin-film layer (3), and retaining only the second semiconductor thin-film layer (3) of a second area. The efficiency in charge carrier injection and extraction is regulated by utilizing band gap differences between the first surface (1) and respectively the first semiconductor thin-film layer (2) and the second semiconductor thin-film layer (3), thus reducing conduction voltage drop while increasing switching speed.
(FR) La présente invention concerne un procédé de fabrication d'une surface arrière de transistor bipolaire à grille isolée (IGBT), et une structure IGBT. Ledit procédé comprend : le dépôt séquentiel d'une première couche à film mince à semi-conducteur (2) et d'une couche diélectrique sur une première surface arrière (1), la retenue uniquement de la première couche à film mince à semi-conducteur (1) et de la couche diélectrique d'une première zone, puis le dépôt d'une seconde couche à film mince à semi-conducteur (3), et la retenue uniquement de la seconde couche à film mince à semi-conducteur (3) d'une seconde zone. Le rendement d'extraction et d'injection de porteurs de charge est régulé en utilisant des différences de largeur de bande interdite entre la première surface (1) et respectivement la première couche à film mince à semi-conducteur (2) et la seconde couche à film mince à semi-conducteur (3), ce qui réduit ainsi la chute de tension de conduction tout en augmentant la vitesse de commutation.
(ZH) 提供一种绝缘栅双极型晶体管(IGBT)背面制作方法及绝缘栅双极型晶体管(IGBT)结构,包括:在第一背面(1)依次沉积第一半导体薄膜层(2)和电介质层,仅保留第一区域的第一半导体薄膜层(1)和电介质层,然后沉积第二半导体薄膜层(3),仅保留第二区域的第二半导体薄膜层(3)。利用第一半导体薄膜层(2)和第二半导体薄膜层(3)分别与第一背面(1)的带隙差来调节载流子注入与抽取效率,以在降低导通压降的同时提高开关速度。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)