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1. (WO2017091782) FIRED MULTILAYER STACKS FOR USE IN INTEGRATED CIRCUITS AND SOLAR CELLS
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/091782 International Application No.: PCT/US2016/063696
Publication Date: 01.06.2017 International Filing Date: 23.11.2016
IPC:
H01L 21/02 (2006.01) ,H01L 21/314 (2006.01) ,H01L 21/316 (2006.01) ,H01L 21/324 (2006.01) ,H01L 21/38 (2006.01) ,H01L 27/142 (2014.01) ,H01L 41/083 (2006.01) ,H01L 41/27 (2013.01) ,H01L 41/273 (2013.01) ,H01L 51/46 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
314
Inorganic layers
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
314
Inorganic layers
316
composed of oxides or glassy oxides or oxide-based glass
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
324
Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
34
the devices having semiconductor bodies not provided for in groups H01L21/06, H01L21/16, and H01L21/18159
38
Diffusion of impurity materials, e.g. doping materials, electrode materials, into, or out of, a semiconductor body, or between semiconductor regions
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
14
including semiconductor components sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
142
Energy conversion devices
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
41
Piezo-electric devices in general; Electrostrictive devices in general; Magnetostrictive devices in general; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
08
Piezo-electric or electrostrictive elements
083
having a stacked or multilayer structure
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
41
Piezo-electric devices in general; Electrostrictive devices in general; Magnetostrictive devices in general; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
22
Processes or apparatus specially adapted for the assembly, manufacture or treatment of piezo-electric or electrostrictive devices or of parts thereof
27
Manufacturing multilayered piezo-electric or electrostrictive devices or parts thereof, e.g. by stacking piezo-electric bodies and electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
41
Piezo-electric devices in general; Electrostrictive devices in general; Magnetostrictive devices in general; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
22
Processes or apparatus specially adapted for the assembly, manufacture or treatment of piezo-electric or electrostrictive devices or of parts thereof
27
Manufacturing multilayered piezo-electric or electrostrictive devices or parts thereof, e.g. by stacking piezo-electric bodies and electrodes
273
by integrally sintering piezo-electric or electrostrictive bodies and electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
51
Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof
42
specially adapted for sensing infra-red radiation, light, electromagnetic radiation of shorter wavelength, or corpuscular radiation; specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
46
Selection of materials
Applicants:
PLANT PV, INC [US/US]; 850 Marina Village Parkway Suite 102 Alameda, California 95401, US
Inventors:
HARDIN, Brian; US
SAUAR, Erik; NO
SUSENO, Dhea; US
HINRICHER, Jesse; US
HUANG, Jennifer; US
LIN, Tom Yu-Tang; US
CONNOR, Stephen; US
HELLEBUSCH, Daniel; US
PETERS, Craig; US
Agent:
CARON, R'Sue; US
Priority Data:
62/259,63624.11.2015US
62/318,56605.04.2016US
62/371,23605.08.2016US
62/423,02016.11.2016US
Title (EN) FIRED MULTILAYER STACKS FOR USE IN INTEGRATED CIRCUITS AND SOLAR CELLS
(FR) EMPILEMENTS MULTICOUCHES CUITS POUR CIRCUITS INTÉGRÉS ET CELLULES SOLAIRES
Abstract:
(EN) Intercalation pastes for use with semiconductor devices are disclosed. The pastes contain precious metal particles, intercalating particles, and an organic vehicle and can be used to improve the material properties of metal particle layers. Specific formulations have been developed to be screen-printed directly onto a dried metal particle layer and fired to make a fired multilayer stack. The fired multilayer stack can be tailored to create a solderable surface, high mechanical strength, and low contact resistance. In some embodiments, the fired multilayer stack can etch through a dielectric layer to improve adhesion to a substrate. Such pastes can be used to increase the efficiency of silicon solar cells, specifically multi- and mono-crystalline silicon back-surface field (BSF), and passivated emitter and rear contact (PERC) photovoltaic cells. Other applications include integrated circuits and more broadly, electronic devices.
(FR) L'invention concerne des pâtes d'intercalation destinées à être utilisées avec des dispositifs à semi-conducteur. Les pâtes contiennent des particules de métal précieux, des particules d'intercalation, et un véhicule organique et peuvent être utilisées pour améliorer les propriétés matérielles de couches de particules métalliques. Des formulations spécifiques ont été mises au point pour être sérigraphiées directement sur une couche de particules métalliques séchée et cuites pour former un empilement multicouche cuit. L'empilement multicouche cuit peut être adapté pour créer une surface soudable, une résistance mécanique élevée, et une faible résistance de contact. Selon certains modes de réalisation, l'empilement multicouche cuit peut graver à travers une couche diélectrique pour améliorer l'adhérence à un substrat. De telles pâtes peuvent être utilisées pour augmenter l'efficacité de cellules solaires en silicium, notamment des cellules photovoltaïques à champ de surface arrière (BSF) en silicium monocristallin et polycristallin, et à émetteur passivé et à contact arrière (PERC). D'autres applications comprennent des circuits intégrés et de façon plus générale, des dispositifs électroniques.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
SG11201804392WIN201837021384KR1020180087342EP3381047