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1. (WO2017090164) CONTROL DEVICE
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2017/090164 International Application No.: PCT/JP2015/083291
Publication Date: 01.06.2017 International Filing Date: 26.11.2015
IPC:
G06F 11/20 (2006.01) ,G06F 11/30 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
07
Responding to the occurrence of a fault, e.g. fault tolerance
16
Error detection or correction of the data by redundancy in hardware
20
using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
30
Monitoring
Applicants:
三菱電機株式会社 MITSUBISHI ELECTRIC CORPORATION [JP/JP]; 東京都千代田区丸の内二丁目7番3号 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 1008310, JP
Inventors:
川崎 純利 KAWASAKI, Sumitoshi; JP
Agent:
溝井 章司 MIZOI, Shoji; JP
Priority Data:
Title (EN) CONTROL DEVICE
(FR) DISPOSITIF DE COMMANDE
(JA) 制御装置
Abstract:
(EN) A receiving unit (101) receives from a first processor a first notification signal which is a notification of the operating state of the first processor, and receives from a second processor a second notification signal which is a notification of the operating state of the second processor. An assessment unit (102) analyzes the first notification signal and assesses the operating state of the first processor, analyzes the second notification signal and assesses the operating state of the second processor, and assesses whether to switch the processor which carries out an access to a storage device from the first processor to the second processor.
(FR) L’invention concerne une unité de réception (101) qui reçoit, à partir d’un premier processeur, un premier signal de notification qui est une notification de l’état de fonctionnement du premier processeur, et reçoit, à partir d’un second processeur, un second signal de notification qui est une notification de l’état de fonctionnement du second processeur. Une unité d’évaluation (102) analyse le premier signal de notification et évalue l’état de fonctionnement du premier processeur, analyse le second signal de notification et évalue l’état de fonctionnement du second processeur, et évalue s’il faut ou non commuter le processeur qui réalise un accès à un dispositif de stockage du premier processeur au second processeur.
(JA) 受信部(101)は、第1のプロセッサから、第1のプロセッサの動作状態を通知する第1の通知信号を受信し、第2のプロセッサから、第2のプロセッサの動作状態を通知する第2の通知信号を受信する。判定部(102)は、第1の通知信号を解析して第1のプロセッサの動作状態を判定し、第2の通知信号を解析して第2のプロセッサの動作状態を判定して、記憶装置へのアクセスを行うプロセッサを第1のプロセッサから第2のプロセッサに切替えるか否かを判定する。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)