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1. (WO2017069804) USE OF AN EXTERNAL GETTER TO REDUCE PACKAGE PRESSURE
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2017/069804 International Application No.: PCT/US2016/033219
Publication Date: 27.04.2017 International Filing Date: 19.05.2016
IPC:
H01L 23/26 (2006.01) ,H01L 23/053 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
16
Fillings or auxiliary members in containers, e.g. centering rings
18
Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
26
including materials for absorbing or reacting with moisture or other undesired substances
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
02
Containers; Seals
04
characterised by the shape
053
the container being a hollow construction and having an insulating base as a mounting for the semiconductor body
Applicants: RAYTHEON COMPANY[US/US]; 870 Winter Street Waltham, MA 02451, US
Inventors: BLACK, Stephen, H.; US
KENNEDY, Adam, M.; US
Agent: GATES, Sarah, M.; US
Priority Data:
14/887,54420.10.2015US
Title (EN) USE OF AN EXTERNAL GETTER TO REDUCE PACKAGE PRESSURE
(FR) UTILISATION D'UN ABSORBEUR EXTERNE POUR RÉDUIRE LA PRESSION D'UN BOÎTIER
Abstract:
(EN) A system and method for forming a wafer level package. In one example, a substrate used in the wafer level package includes a surface defined by a wafer level package (WLP) region and an external region, and a layer of getter material is disposed on at least a portion of the external region. According to one embodiment, the external region comprises a saw-to-reveal (STR) region of the wafer.
(FR) L'invention concerne un système et un procédé de formation d'un boîtier sur tranche. Dans un exemple, un substrat utilisé dans le boîtier sur tranche comprend une surface définie par une région de boîtier sur tranche (WLP) et une région externe, et une couche de matériau absorbeur est disposée sur au moins une partie de la région externe. Selon un mode de réalisation, la région externe comporte une région à découvrir par sciage (STR) de la tranche.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)