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1. (WO2017065510) PHASE-LOCKED LOOP WITH HIGH BANDWIDTH USING RISING EDGE AND FALLING EDGE OF SIGNAL

Pub. No.:    WO/2017/065510    International Application No.:    PCT/KR2016/011470
Publication Date: Fri Apr 21 01:59:59 CEST 2017 International Filing Date: Fri Oct 14 01:59:59 CEST 2016
IPC: H03L 7/089
H03L 7/099
H03L 7/093
Applicants: INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY
한양대학교 산학협력단
Inventors: YOO, Chang Sik
유창식
LIM, Baek Jin
임백진
Title: PHASE-LOCKED LOOP WITH HIGH BANDWIDTH USING RISING EDGE AND FALLING EDGE OF SIGNAL
Abstract:
Disclosed is a phase-locked loop having a high bandwidth using the rising edge and falling edge of a signal. The disclosed phase-locked loop controls the frequency of a voltage controlled oscillator by comparing both a phase difference between the rising edges of a reference signal and a feedback signal, and a phase difference between the falling edges thereof.