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1. (WO2017057358) SEMICONDUCTOR DEVICE
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Pub. No.: WO/2017/057358 International Application No.: PCT/JP2016/078446
Publication Date: 06.04.2017 International Filing Date: 27.09.2016
IPC:
H01L 21/822 (2006.01) ,H01L 21/8234 (2006.01) ,H01L 27/04 (2006.01) ,H01L 27/06 (2006.01) ,H01L 27/088 (2006.01) ,H01L 29/78 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
8232
Field-effect technology
8234
MIS technology
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
06
including a plurality of individual components in a non-repetitive configuration
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
08
including only semiconductor components of a single kind
085
including field-effect components only
088
the components being field-effect transistors with insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
Applicants:
ローム株式会社 ROHM CO., LTD. [JP/JP]; 京都府京都市右京区西院溝崎町21番地 21, Saiin Mizosaki-Cho, Ukyo-Ku, Kyoto-Shi, Kyoto 6158585, JP
Inventors:
▲高▼橋 直樹 TAKAHASHI Naoki; JP
Agent:
特許業務法人 佐野特許事務所 SANO PATENT OFFICE; 大阪府大阪市中央区天満橋京町2-6天満橋八千代ビル別館5F 5F, Tenmabashi-Yachiyo Bldg. Bekkan, 2-6, Tenmabashi-Kyomachi, Chuo-Ku, Osaka-Shi, Osaka 5400032, JP
Priority Data:
2015-19607701.10.2015JP
Title (EN) SEMICONDUCTOR DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEURS
(JA) 半導体装置
Abstract:
(EN) A semiconductor device 100 has a power transistor N1 of vertical structure and a temperature detection element 10a for detecting abnormal heat generation by the power transistor N1. The power transistor N1 includes a first electrode 208 formed on a first main surface side (front surface side) of a semiconductor substrate 200, a second electrode 209 formed on a second main surface side (rear surface side) of the semiconductor substrate 200, and pads 210a-210f positioned unevenly on the first electrode 208. The temperature detection element 10a is formed at a location of the highest heat generation by the power transistor N1, the location (near the pad 210b where it is easiest for current to be concentrated) being specified using the uneven positioning of the pads 210a-210f.
(FR) L'invention concerne un dispositif à semi-conducteurs (100) qui possède un transistor de puissance N1 de structure verticale et un élément de détection de température (10a) pour détecter une génération de chaleur anormale par le transistor de puissance N1. Le transistor de puissance N1 comprend une première électrode (208) formée sur un premier côté de surface principale (côté de surface avant) d'un substrat semi-conducteur (200), une seconde électrode (209) formée sur un second côté de surface principale (côté de surface arrière) du substrat semi-conducteur (200), et des plots (210a-210f) positionnés de manière non régulière sur la première électrode (208). L'élément de détection de température (10a) est formé au niveau d'un emplacement de la génération de chaleur la plus élevée par le transistor de puissance N1, l'emplacement (à proximité du plot 210b où il est le plus facile pour le courant d'être concentré) étant spécifié à l'aide du positionnement non régulier des plots (210a-210f).
(JA) 半導体装置100は、縦型構造のパワートランジスタN1と、パワートランジスタN1の異常発熱を検出する温度検出素子10aと、を有する。パワートランジスタN1は、半導体基板200の第1主面側(表面側)に形成された第1電極208と、半導体基板200の第2主面側(裏面側)に形成された第2電極209と、第1電極208上で偏在配置されたパッド210a~210fと、を含む。温度検出素子10aは、パッド210a~210fの偏在配置により特定されるパワートランジスタN1の最大発熱箇所(最も電流の集中しやすいパッド210bの近傍)に形成されている。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)