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1. (WO2017056915) CIRCUIT STRUCTURE AND ELECTRICAL JUNCTION BOX
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Pub. No.: WO/2017/056915 International Application No.: PCT/JP2016/076563
Publication Date: 06.04.2017 International Filing Date: 09.09.2016
IPC:
H02G 3/16 (2006.01) ,H05K 7/06 (2006.01)
H ELECTRICITY
02
GENERATION, CONVERSION, OR DISTRIBUTION OF ELECTRIC POWER
G
INSTALLATION OF ELECTRIC CABLES OR LINES, OR OF COMBINED OPTICAL AND ELECTRIC CABLES OR LINES
3
Installations of electric cables or lines or protective tubing therefor in or on buildings, equivalent structures or vehicles
02
Details
08
Distribution boxes; Connection or junction boxes
16
structurally associated with support for line-connecting terminals within the box
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
7
Constructional details common to different types of electric apparatus
02
Arrangements of circuit components or wiring on supporting structure
06
on insulating boards
Applicants:
株式会社オートネットワーク技術研究所 AUTONETWORKS TECHNOLOGIES, LTD. [JP/JP]; 三重県四日市市西末広町1番14号 1-14, Nishisuehiro-cho, Yokkaichi-shi, Mie 5108503, JP
住友電装株式会社 SUMITOMO WIRING SYSTEMS, LTD. [JP/JP]; 三重県四日市市西末広町1番14号 1-14, Nishisuehiro-cho, Yokkaichi-shi, Mie 5108503, JP
住友電気工業株式会社 SUMITOMO ELECTRIC INDUSTRIES, LTD. [JP/JP]; 大阪府大阪市中央区北浜4丁目5番33号 5-33, Kitahama 4-chome, Chuo-ku, Osaka-shi, Osaka 5410041, JP
Inventors:
陳 登 CHIN Tou; JP
中村 有延 NAKAMURA Arinobu; JP
Agent:
特許業務法人暁合同特許事務所 AKATSUKI UNION PATENT FIRM; 愛知県名古屋市中区栄二丁目1番1号 日土地名古屋ビル5階 5th Floor, Nittochi Nagoya Bldg., 1-1, Sakae 2-chome, Naka-ku, Nagoya-shi, Aichi 4600008, JP
Priority Data:
2015-19071829.09.2015JP
Title (EN) CIRCUIT STRUCTURE AND ELECTRICAL JUNCTION BOX
(FR) STRUCTURE DE CIRCUIT ET BOÎTE DE JONCTION ÉLECTRIQUE
(JA) 回路構成体及び電気接続箱
Abstract:
(EN) Provided is a circuit structure 20 provided with: an electronic component 36 having a plurality of terminals 38; a first substrate 22 in which an electroconductive path is formed on an insulating plate and in which a through-hole 23, into which the electronic component 36 is inserted, is formed; a bus bar 27 overlapped onto the first substrate 22; and a second substrate 30 in which an electroconductive path is formed on an insulating plate, the second substrate 30 being overlapped onto the first substrate 22, and at least a part of the second substrate 30 being disposed on the same layer as the bus bar 27. The plurality of terminals 38 of the electronic component 36 are connected to the bus bar 27 and the electroconductive path 31 of the second substrate 30.
(FR) L'invention concerne une structure de circuit 20 qui est pourvue : d'un composant électronique 36 ayant une pluralité de bornes 38 ; d'un premier substrat 22 dans lequel un chemin conducteur de l'électricité est formé sur une plaque isolante et dans lequel un trou traversant 23, dans lequel le composant électronique 36 est inséré, est formé ; d'une barre omnibus 27 superposée sur le premier substrat 22 ; d'un second substrat 30 dans lequel un chemin conducteur de l'électricité est formé sur une plaque isolante, le second substrat 30 étant superposé sur le premier substrat 22, et au moins une partie du second substrat 30 étant disposée sur la même couche que la barre omnibus 27. La pluralité de bornes 38 du composant électronique 36 sont connectées à la barre omnibus 27 et au chemin conducteur de l'électricité 31 du second substrat 30.
(JA) 回路構成体20は、複数の端子38を有する電子部品36と、絶縁板に導電路が形成され、電子部品36が挿通される挿通孔23が形成された第1基板22と、第1基板22に重ねられたバスバー27と、絶縁板に導電路が形成され、第1基板22に重ねられて少なくとも一部がバスバー27と同層に配された第2基板30と、を備え、電子部品36の複数の端子38は、バスバー27と第2基板30の導電路31とに接続されている。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, KE, KG, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)