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1. WO2017046789 - SYSTEM AND METHOD FOR SECURELY CONNECTING TO A PERIPHERAL DEVICE

Note: Text based on automatic Optical Character Recognition processes. Please use the PDF version for legal matters

[ EN ]

Claims

1. A device connectable between a host computer and a peripheral device using a standard bus, the device comprising:

a first module comprising:

a first connector connectable to a first cable for connecting to the host computer;

a first transceiver coupled to the first connector for transmitting messages to, and receiving messages from, the host computer over the first cable using the standard bus; and

a first memory storing a first firmware and a first processor for executing the first firmware, the first processor is coupled to control, and to communicate with, the first transceiver,

wherein the first module is configured to emulate the peripheral device to the host computer; a second module comprising:

a second connector connectable to a second cable for connecting to the peripheral device; a second transceiver coupled to the second connector for transmitting messages to, and receiving messages from, the peripheral device over the second cable using the standard bus; and a second memory storing a second firmware and a second processor for executing the second firmware, the second processor is coupled to control, and to communicate with, the second transceiver,

wherein the second module is configured to emulate the host computer to the peripheral device;

a third module comprising:

a third memory storing a third firmware and a third processor for executing the third firmware, the third processor is coupled to control, and to communicate with, the second transceiver,

wherein the third module is communicatively coupled to the first module exclusively over a first local bus, and is communicatively coupled to the second module exclusively over a second local bus;

and a single enclosure housing the first, second, and third modules.

2. The device according to claim 1 , wherein the peripheral device is an input device for receiving data from a user.

3. The device according to claim 2, wherein the peripheral device consists of, or comprises, a keyboard, a pointing device, a trackball, a touch-pad, a touch-screen, a scanner, a digital camera, or a joystick.

4. The device according to claim 1 , wherein the peripheral device is an output device for notifying data to a user.

5. The device according to claim 4, wherein the user notification consists of, comprises, or is based on, text, graphics, tactile, audio, or video.

6. The device according to claim 4, wherein the output device consists of, or comprises, a printer, a display, or a speaker.

7. The device according to claim 1, wherein the peripheral device is a non-volatile memory, and at least part of the messages are associated with reading from, or writing to, the non-volatile memory.

8. The device according to claim 7, wherein the non-volatile memory consists of, or comprises, Hard Disk Drive (HDD), Solid State Drive (SSD), RAM, SRAM, DRAM, TTRAM, Z-RAM, ROM,

PROM, EPROM, EEPROM, Flash-based memory, CD-RW, DVD-RW, DVD+RW, DVD-RAM BD-RE, CD-ROM, BD-ROM, or DVD-ROM.

9. The device according to claim 1 further operative to detect a malware or a malware activity, and, wherein the malware consists of, includes, or is based on, a computer virus, spyware, DoS (Denial of Service), rootkit, ransomware, adware, backdoor, Trojan horse, or a destructive malware.

10. The device according to claim 1, wherein the standard bus is an industry standard bus, and, wherein the first and second connectors, the first and second cables, the first and second transceivers, the communication between the first module and the host computer, and the communication between the second module and the peripheral device, are according to, or based on, the industry standard bus. 11. The device according to claim 10, wherein the industry standard bus defines a point-to-point serial communication.

12. The device according to claim 11, wherein the industry standard bus is according to, or based on, a Universal Standard Bus (USB).

13. The device according to claim 12, wherein the industry standard bus is according to, or based on, USB 2.0 or USB 3.0.

14. The device according to claim 11, wherein the industry standard bus is according to, or based on, Peripheral Component Interconnect (PCI) Express, Small Computer System Interface (SCSI), Serial Attached SCSI (SAS), Serial ATA (SATA), InfiniBand, PCI, PCI-X, AGP, Thunderbolt, IEEE 1394, FireWire, or Fibre-Channel.

15. The device according to claim 1 , wherein the first firmware comprises a first operating system for execution by the first processor, the second firmware comprises a second operating system for

execution by the second processor, and the third firmware comprises a third operating system for execution by the third processor.

16. The device according to claim 15, wherein the first, second, or third operating system consists of, comprises, is according to, or is based on, Linux.

17. The device according to claim 15, wherein the first, second, or third operating system consists of, comprises, is according to, or is based on, Microsoft Windows or WDM.

18. The device according to claim 17, wherein the first, second, or third operating system consists of, comprises, is according to, or based on, one out of Microsoft Windows 7, Microsoft Windows XP, Microsoft Windows 8, Microsoft Windows 8.1, and Google Chrome OS.

19. The device according to claim 15, wherein the first, second, or third operating system consists of, comprises, is according to, or is based on, a mobile operating system.

20. The device according to claim 19, wherein the mobile operating system consists of, comprises, is according to, or is based on, Android version 2.2 (Froyo), Android version 2.3 (Gingerbread), Android version 4.0 (Ice Cream Sandwich), Android Version 4.2 (Jelly Bean), Android version 4.4 (KitKat), Apple iOS version 3, Apple iOS version 4, Apple iOS version 5, Apple iOS version 6, Apple iOS version 7, Microsoft Windows® Phone version 7, Microsoft Windows® Phone version 8, Microsoft Windows® Phone version 9, or Blackberry® operating system.

21. The device according to claim 15, wherein first, second, or third operating system comprises, is according to, uses, or is based on, a class driver, an Human Input device (FUD) driver, a minidriver, a class driver, a USB host driver, a USB peripheral driver, a PnP driver, a msdos.sys driver, a io.sys driver, a config.sys driver, or a function driver.

22. The device according to claim 1, wherein the first or the second local bus is a synchronous serial bus.

23. The device according to claim 22, wherein the first or the second local bus is a master / slave bus for connecting ICs.

24. The device according to claim 22, wherein the first or the second local bus is based on, is according to, or comprises, Serial Peripheral Interface (SPI) bus or Inter-Integrated Circuit (PC) bus.

25. The device according to claim 1, wherein the first or the second local bus is a bi-directional bus.

26. The device according to claim 25, wherein the first or the second local bus is a half-duplex or a full-duplex bus.

27. The device according to claim 1, wherein the first or the second local bus is a uni-directional bus.

28. The device according to claim 27, wherein the first local bus exclusively allows data transfer from the first module to the third module.

29. The device according to claim 27, wherein the first local bus exclusively allows data transfer from the third module to the first module.

30. The device according to claim 27, wherein the second local bus exclusively allows data transfer from the first module to the second module.

31. The device according to claim 27, wherein the second local bus exclusively allows data transfer from the third module to the second module.

32. The device according to claim 1, wherein the first or second local bus is using isolation barriers so that the respective first or second module is galvanically isolated over the respective bus from the third module.

33. The device according to claim 32, wherein the isolation barrier is based on capacitance, induction, or electromagnetic waves, or optical means.

34. The device according to claim 33, wherein first or second local bus comprise or use optocouplers or isolation transformers for galvanically isolating the respective modules.

35. The device according to claim 1, wherein the standard bus is defined to carry a power signal and, wherein the first cable is connected to carry a first power signal and the second cable is connected to carry a second power signal, and, wherein the first module is configured to terminate the first power signal carried over the first cable, and the second module is configured to supply the second power signal.

36. The device according to claim 1 further comprising a first, second, and third power connections, wherein the first module is connected to be powered exclusively from the first power connection, the second module is connected to be powered exclusively from the second power connection, and the third module is connected to be powered exclusively from the third power connection.

37. The device according to claim 36 for use with a power source, further comprising a first Low Pass Filter (LPF) connected between the power source and the first power connection, a second Low Pass Filter (LPF) connected between the power source and the second power connection, and a third Low Pass Filter (LPF) connected between the power source and the third power connection.

38. The device according to claim 37, wherein the first, second, or third LPF is structured according to, based on, or comprises, a Chebyshev filter, a Butterworth filter, a Bessel filter, or an Elliptic filter.

39. The device according to claim 37, wherein the first, second, or third LPF is structured according to, based on, or comprises first order passive LPF that is according to, based on, or comprises, RC, RL, or RLC filter.

40. The device according to claim 36, wherein the power source is a primary or rechargeable battery. 41. The device according to claim 36, wherein the power source is an AC power source, and the device further comprises a step-down transformer and an AC/DC converter for DC powering the modules.

42. The device according to claim 36, wherein the first cable further carrying a power signal, and, wherein the module is entirely or in part powered from the power signal.

43. The device according to claim 42, wherein the first module is powered from the power signal.

44. The device according to claim 43, wherein the first and third modules are powered from the power signal.

45. The device according to claim 44, wherein the first, second, and third modules are powered from the power signal.

46. The device according to claim 1 further integrated with the host computer.

47. The device according to claim 46, wherein the single enclosure further houses the host computer.

48. The device according to claim 1 further integrated with the peripheral device.

49. The device according to claim 48, wherein the single enclosure further houses the peripheral device.

50. The device according to claim 1, wherein the first, second, or third module is implemented in the form of a die, an IC, a box-shaped enclosure, a PCB carrying ICs and other electronic components, a plug-in card, or a removable enclosure.

51. The device according to claim 1, wherein the single enclosure is a box-shaped enclosure.

52. The device according to claim 51, wherein the single enclosure is hand-held or shaped as a 'stick' or 'dongle'.

53. The device according to claim 51, wherein the single enclosure is shaped or constructed as a plug-in and removable unit with the host computer or with the peripheral device.

54. The device according to claim 53, wherein the single enclosure is mechanically attached and electrically connected using the first connector.

55. The device according to claim 53, wherein the single enclosure is mechanically attached and electrically connected using the second connector.

56. The device according to claim 1 further comprising a first, second, and third clock connections, wherein the first module is connected to exclusively use the first clock connection, the second module is connected to exclusively use the second clock connection, and the third module is connected to exclusively use the third clock connection.

57. The device according to claim 56 further comprising an oscillator connected to supply a clock signal to the first, second, and third clock connections.

58. The device according to claim 57, wherein the oscillator is a quartz crystal oscillator.

59. The device according to claim 56 further comprising a first, second, and third oscillators respectively connected to supply a clock signal to the first, second, and third clock connections. 60. The device according to claim 59, wherein each of the oscillators is a quartz crystal oscillator.

61. The device according to claim 1 further for connecting to an additional peripheral device using the standard bus, the device further comprising in the single enclosure a fourth module, the fourth module comprising:

a third connector connectable to a third cable for connecting to the additional peripheral device;

a third transceiver coupled to the third connector for transmitting messages to, and receiving messages from, the additional peripheral device over the third cable using the standard bus; and a fourth memory storing a fourth firmware and a fourth processor for executing the fourth firmware, the fourth processor is coupled to control, and to communicate with, the third transceiver, wherein the fourth module is configured to emulate the host computer to the additional peripheral device.

62. The device according to claim 61, wherein the third module is communicatively coupled to the fourth module exclusively over a third local bus.

63. The device according to claim 62 configured to pass messages between the additional peripheral device and the host computer over the third local bus.

64. The device according to claim 1 further comprising in the single enclosure a sensor that output sensor data in response to a physical phenomenon, the sensor is coupled to the third processor for responding to the physical phenomenon.

65. The device according to claim 64, wherein the sensor is an occupancy sensor for detecting occupancy of a space by a human body.

66. The device according to claim 65, wherein the sensor outputs data in response to detecting a presence of a human body by using electric effect, inductive coupling, capacitive coupling, triboelectric effect, piezoelectric effect, fiber optic transmission, or radar intrusion sensing.

67. The device according to claim 65, wherein the occupancy sensor consists of, comprises, or is based on, an acoustic sensor, opacity, geomagnetism, magnetic sensors, magnetometer, reflection of transmitted energy, infrared laser radar, microwave radar, electromagnetic induction, or vibration.

68. The device according to claim 65, wherein the occupancy sensor consists of, comprises of, or is based on, a motion sensor.

69. The device according to claim 68, wherein the motion sensor is a mechanically actuated sensor, passive or active electronic sensor, ultrasonic sensor, microwave sensor, tomographic detector, passive infrared (PIR) sensor, laser optical detector, or acoustical detector.

70. The device according to claim 65, wherein the sensor is a photoelectric sensor that responds to a visible or an invisible light, the invisible light is infrared, ultraviolet, X-rays, or gamma rays, and, wherein the photoelectric sensor is based on the photoelectric or photovoltaic effect, and consists of, or comprises, a semiconductor component that consists of, or comprises, a photodiode, or a phototransistor.

71. The device according to claim 70, wherein the photoelectric sensor is based on Charge-Coupled Device (CCD) or a Complementary Metal-Oxide Semiconductor (CMOS) component.

72. The device according to claim 1 further comprising in the single enclosure a sensor that output sensor data in response to a physical phenomenon produced by the peripheral device, the sensor is coupled to the third processor for responding to the physical phenomenon.

73. The device according to claim 72, wherein the sensor is a piezoelectric sensor that uses the piezoelectric effect, includes single crystal material or a piezoelectric ceramics, and uses transverse, longitudinal, or shear effect mode.

74. The device according to claim 72, wherein the sensor comprises multiple sensors arranged as a directional sensor array directed to the peripheral device.

75. The device according to claim 74, further operative to estimate the number, magnitude, frequency, Direction-Of-Arrival (DOA), distance, or speed of the signal impinging the sensor array.

76. The device according to claim 72, wherein the sensor is a thermoelectric sensor that responds to a temperature or a temperature gradient of an object or of the peripheral device.

77. The device according to claim 76, wherein the thermoelectric sensor senses the peripheral device temperature using conduction, convection, or radiation.

78. The device according to claim 76, wherein the thermoelectric sensor consists of, or comprises, a Positive Temperature Coefficient (PTC) thermistor, a Negative Temperature Coefficient (NTC) thermistor, a thermocouple, a quartz crystal, or a Resistance Temperature Detector (RTD).

79. The device according to claim 72, wherein the sensor is a photoelectric sensor that responds to visible or an invisible light, wherein the photoelectric sensor is based on the photoelectric or photovoltaic effect, and consists of, or comprises, a semiconductor component.

80. The device according to claim 79, wherein the invisible light is infrared, ultraviolet, X-rays, or gamma rays.

81. The device according to claim 79, wherein the semiconductor component consists of, or comprises, a photodiode, a phototransistor, or a solar cell.

82. The device according to claim 72, wherein the sensor is an electroacoustic sensor that responds to a sound produced by the peripheral device.

83. The device according to claim 82, wherein the electroacoustic sensor responds to audible or inaudible audio, and, wherein the electroacoustic sensor is a microphone that is omnidirectional, unidirectional, or bidirectional.

84. The device according to claim 83, wherein the microphone is based on the sensing the incident sound based motion of a diaphragm or a ribbon.

85. The device according to claim 83, wherein the microphone consists of, or comprising, a condenser, an electret, a dynamic, a ribbon, a carbon, or a piezoelectric microphone.

86. The device according to claim 72, wherein the sensor consists of, or comprises, a nanosensor, a crystal, or a semiconductor, and, wherein the sensor is an ultrasonic based or is a proximity sensor.

87. The device according to claim 1 for use with a VPN server communicating with the host computer over the Internet, the third firmware further comprises a VPN client for execution by the third processor, so that when executed by the third processor, the device establish a VPN connection with the VPN server over the Internet via the host computer.

88. The device according to claim 87, wherein the VPN connection is according to, uses, or is based on, Point-to-Point Tunneling Protocol (PPTP), Layer Two Tunneling Protocol (L2TP), or Secure Socket Tunneling Protocol (SSTP).

89. The device according to claim 87 further configured to transmit to the VPN server over the established VPN messages that were received from the peripheral device.

90. The device according to claim 87 further configured to transmit to the peripheral device messages that were received from the VPN server over the established VPN.

91. The device according to claim 87, wherein the peripheral device consists of, or includes, a nonvolatile memory storing a content, and, wherein the device is further configured to read the entire of, or a part of, the content from the non-volatile memory, and transmit the read content to the VPN server over the established VPN connection.

92. The device according to claim 1 configured to pass messages received from the peripheral device to the host computer, or to pass messages received from the host computer to the peripheral device.

93. The device according to claim 92 further configured to pass messages received from the peripheral device to the host computer, and to pass messages received from the host computer to the peripheral device.

94. The device according to claim 1 further selectable to be in first and second states, wherein in the first state the device is operative to transparently pass messages between the peripheral device and the host computer, and, wherein in the second state the device is operative to block messages from passing between the peripheral device and the host computer.

95. The device according to claim 94 further comprising in the single enclosure a sensor that output sensor data in response to a physical phenomenon produced by the peripheral device, the sensor is coupled to the third processor for responding to the physical phenomenon, and, wherein the device is configured to change states in response to the sensor output data.

96. The device according to claim 1, wherein the third firmware includes instructions that when executed causes the third processor to identify and analyze a message received from the peripheral device over the second local bus, or to identify and analyze a message received from the host computer over the first local bus.

97. The device according to claim 96, wherein the third firmware further includes instructions that when executed causes the third processor to store in a memory the identified message from the peripheral device or from the host computer.

98. The device according to claim 96 for use with a group of messages, wherein the third firmware further includes instructions that when executed causes the third processor to check whether the identified message is included in the group.

99. The device according to claim 98, wherein the group is stored in the third memory.

100. The device according to claim 98 further selectable to be in first and second states, wherein responsive to the identified message being included in the group, the device shifts from a first state to a second state.

101. The device according to claim 98 further selectable to be in first and second states, wherein responsive to the identified message not being included in the group, the device shifts from a first state to a second state.

102. The device according to claim 1, wherein the third firmware includes instructions that when executed causes the third processor to identify and analyze a group containing multiple consecutively received messages received from the peripheral device over the second local bus, or to identify and analyze a message received from the host computer over the first local bus.

103. The device according to claim 102 for use with a first group of multiple messages, wherein the third firmware further includes instructions that when executed causes the third processor to check whether the identified messages group is included in the first group.

104. The device according to claim 102 for use with a criterion, and, wherein the identified messages group are analyzed whether the criterion is satisfied.

105. The device according to claim 104, wherein the criterion is based on a pattern of the messages.

106. The device according to claim 104, wherein the criterion is based on a repetition of a specific message in the group or on an order of defined messages in the group.

107. A method for analyzing messages by a device connected between a host computer and a peripheral device using a standard bus, the method comprising:

emulating the peripheral device to the host computer using a first processor executing a first firmware stored in a first memory, for receiving messages from, and transmitting messages to, the host computer over a first cable using the standard bus;

emulating the host computer to the peripheral device using a second processor executing a second firmware stored in a second memory, for receiving messages from, and transmitting messages to, the peripheral device over a second cable using the standard bus;

analyzing messages using a third processor executing a third firmware stored in a third memory;

transporting messages between the host computer and the third processor exclusively over a first local bus; and

transporting messages between the peripheral device and the third processor exclusively over a second local bus.

108. The method according to claim 107 for use with a criterion, the method further comprising: receiving a first message by the second processor from the peripheral device;

sending the first message over the second local bus to the third processor;

checking the first message by the third processor for satisfying the criterion;

responsive to the message satisfying the criterion, sending the first message over the first local bus to the second processor; and

sending the first message by the first processor to the host computer.

109. The method according to claim 108, wherein the peripheral device is an input device for sensing an action by a user.

110. The method according to claim 109, wherein the peripheral device consists of, or comprises, a keyboard, a pointing device, a trackball, a touch-pad, a touch-screen, a scanner, a digital camera, or a joystick.

111. The method according to claim 109, wherein the first message is associated with the user action.

112. The method according to claim 107 for use with a criterion, the method further comprising: receiving a first message by the first processor from the host computer;

sending the first message over the first local bus to the third processor;

checking the first message by the third processor for satisfying the criterion;

responsive to the message satisfying the criterion, sending the first message over the second local bus to the second processor; and

sending the first message by the second processor to the peripheral device.

113. The method according to claim 112, wherein the peripheral device is an output device for notifying information to a user.

114. The method according to claim 113, wherein the user notification consists of, comprises, or is based on, text, graphics, tactile, audio, or video.

115. The method according to claim 113, wherein the output device consists of, or comprises, a printer, a display, or a speaker.

116. The method according to claim 113, wherein the first message is associated with the information used for the user notification.

117. The method according to claim 107, wherein the peripheral device is a non- volatile memory, and at least part of the messages are associated with reading from, or writing to, the memory.

118. The method according to claim 117, wherein the non-volatile memory consists of, or comprises, Hard Disk Drive (HDD), Solid State Drive (SSD), RAM, SRAM, DRAM, TTRAM, Z-RAM, ROM,

PROM, EPROM, EEPROM, Flash-based memory, CD-RW, DVD-RW, DVD+RW, DVD-RAM BD-RE, CD-ROM, BD-ROM, or DVD-ROM.

119. The method according to claim 107 further comprising detecting a malware or a malware activity.

120. The method according to claim 119, wherein the malware consists of, includes, or is based on, a computer virus, spyware, DoS (Denial of Service), rootkit, ransomware, adware, backdoor, Trojan horse, or a destructive malware.

121. The method according to claim 107, wherein the standard bus is an industry standard bus, and, wherein the first and second cables, the communication with the host computer, and the communication with the peripheral device, are according to, or based on, the industry standard bus.

122. The method according to claim 121, wherein the industry standard bus defines a point-to-point serial communication.

123. The method according to claim 122, wherein the industry standard bus is according to, or based on, a Universal Standard Bus (USB).

124. The method according to claim 123, wherein the industry standard bus is according to, or based on, USB 2.0 or USB 3.0.

125. The method according to claim 121, wherein the industry standard bus is according to, or based on, Peripheral Component Interconnect (PCI) Express, Small Computer System Interface (SCSI), Serial Attached SCSI (SAS), Serial ATA (SATA), InfiniBand, PCI, PCI-X, AGP, Thunderbolt, IEEE 1394, FireWire, or Fibre-Channel.

126. The method according to claim 107, wherein the first firmware comprises a first operating system, the second firmware comprises a second operating system, and the third firmware comprises a third operating system.

127. The method according to claim 126 further comprising:

executing, by the first processor, the first operating system;

executing, by the second processor, the second operating system; and

executing, by the third processor, the third operating system.

128. The method according to claim 126, wherein the first, second, or third operating system consists of, comprises, is according to, or is based on, Linux.

129. The method according to claim 126, wherein the first, second, or third operating system consists of, comprises, is according to, or is based on, Microsoft Windows or WDM.

130. The method according to claim 129, wherein the first, second, or third operating system consists of, comprises, is according to, or based on, one out of Microsoft Windows 7, Microsoft Windows XP, Microsoft Windows 8, Microsoft Windows 8.1, and Google Chrome OS.

131. The method according to claim 126, wherein the first, second, or third operating system consists of, comprises, is according to, or is based on, a mobile operating system.

132. The method according to claim 131, wherein the mobile operating system consists of, comprises, is according to, or is based on, Android version 2.2 (Froyo), Android version 2.3 (Gingerbread), Android version 4.0 (Ice Cream Sandwich), Android Version 4.2 (Jelly Bean), Android version 4.4 (KitKat), Apple iOS version 3, Apple iOS version 4, Apple iOS version 5, Apple iOS version 6, Apple iOS version 7, Microsoft Windows® Phone version 7, Microsoft Windows® Phone version 8, Microsoft Windows® Phone version 9, or Blackberry® operating system.

133. The method according to claim 126, wherein first, second, or third operating system comprises, is according to, uses, or is based on, a class driver, an Human Input device (HJD) driver, a minidriver, a class driver, a USB host driver, a USB peripheral driver, a PnP driver, a msdos.sys driver, a io.sys driver, a config.sys driver, or a function driver.

134. The method according to claim 107, wherein the first or the second local bus is a synchronous serial bus.

135. The method according to claim 134, wherein the first or the second local bus is a master / slave bus for connecting ICs.

136. The method according to claim 134, wherein the first or the second local bus is based on, is according to, or comprises, Serial Peripheral Interface (SPI) bus or Inter-Integrated Circuit (PC) bus.

137. The method according to claim 107, wherein the first or the second local bus is a bi-directional bus.

138. The method according to claim 137, wherein the first or the second local bus is a half-duplex or a full-duplex bus.

139. The method according to claim 107, wherein the first or the second local bus is a uni-directional bus.

140. The method according to claim 139, wherein the first local bus exclusively allows data transfer from the first processor to the third processor.

141. The method according to claim 139, wherein the first local bus exclusively allows data transfer from the third processor to the first processor.

142. The method according to claim 139, wherein the second local bus exclusively allows data transfer from the first processor to the second processor.

143. The method according to claim 139, wherein the second local bus exclusively allows data transfer from the third processor to the second processor.

144. The method according to claim 107, wherein the first or second local bus is using isolation barriers so that the respective first or second processor is galvanically isolated over the respective bus from the third processor.

145. The method according to claim 144, wherein the isolation barrier is based on a capacitance, induction, or electromagnetic waves, or optical barrier.

146. The method according to claim 145, wherein the first or second local bus comprise or use optocouplers or isolation transformers for galvanically isolating the respective processors.

147. The method according to claim 107, wherein the standard bus is defined to carry a power signal and, wherein the first cable is connected to carry a first power signal and the second cable is connected to carry a second power signal, the method further comprising:

receiving the first power signal from the first cable; and

supplying the second power signal to the second cable.

148. The method according to claim 107 for use with a first, second, and third power connections, wherein the first processor and the first memory are connected to be powered exclusively from the first power connection, the second processor and the second memory are connected to be powered exclusively from the second power connection, and the third processor and the third memory are connected to be powered exclusively from the third power connection.

149. The method according to claim 148 for use with a power source, the method further comprising: receiving an electrical power from a power source;

supplying a first power signal from the power source to the first power connection;

supplying a second power signal from the power source to the second power connection; and supplying a third power signal from the power source to the third power connection.

150. The method according to claim 149, wherein the power source is a primary or rechargeable battery.

151. The method according to claim 149, wherein the power source is an AC power source supplying AC power having an AC power voltage, and the method further comprising:

stepping-down the AC power voltage; and

converting the stepped-down AC power to a DC power signal.

152. The method according to claim 151, wherein each of the first, second, and third power signal is a DC power signal.

153. The method according to claim 152, wherein the DC power signal is 3.3 VDC, 5VDC, or 12 VDC.

154. The method according to claim 148 for use with a power source, further for use with a first Low Pass filter (LPF) connected between the power source and the first power connection, a second Low Pass Filter (LPF) connected between the power source and the second power connection, and a third Low Pass Filter (LPF) connected between the power source and the third power connection, the method further comprising:

filtering the first power signal by the first Low Pass filter (LPF);

filtering the second power signal by the second Low Pass filter (LPF); and

filtering the third power signal by the third Low Pass filter (LPF).

155. The method according to claim 154, wherein the first, second, or third LPF is structured according to, based on, or comprises, a Chebyshev filter, a Butterworth filter, a Bessel filter, or an Elliptic filter.

156. The method according to claim 154, wherein the first, second, or third LPF is structured according to, based on, or comprises first order passive LPF that is according to, based on, or comprises, RC, RL, or RLC filter.

157. The method according to claim 107, wherein the first cable further carrying a power signal, the method further comprising:

receiving the power signal from the first cable; and

powering, entirely or in part, the first processor and the first memory by the power signal from the first cable.

158. The method according to claim 157 further comprising powering, entirely or in part, the third processor and the third memory by the power signal from the first cable.

159. The method according to claim 158 further comprising powering, entirely or in part, the second processor and the second memory by the power signal from the first cable.

160. The method according to claim 107, wherein the first processor, the second processor, and the third processor are further integrated with the host computer.

161. The method according to claim 107, wherein the first processor, the second processor, and the third processor are further integrated with the peripheral device.

162. The method according to claim 107, wherein first processor, the second processor, and the third processor are enclosed in a single enclosure that is a box-shaped enclosure.

163. The method according to claim 162, wherein the single enclosure is hand-held or shaped as a 'stick' or 'dongle'.

164. The method according to claim 162, wherein the single enclosure is shaped or constructed as a plug-in and removable unit with the host computer or with the peripheral method.

165. The method according to claim 164 further comprising mechanically attaching and electrically connecting the single enclosure to the host computer.

166. The method according to claim 164 further comprising mechanically attaching and electrically connecting the single enclosure to the peripheral device.

167. The method according to claim 107 for use with a first, second, and third clock connections, wherein the first processor is connected to exclusively use the first clock connection, the second processor is connected to exclusively use the second clock connection, and the third processor is connected to exclusively use the third clock connection.

168. The method according to claim 167 further for use with an oscillator providing a clock signal, the method further comprising:

receiving the clock signal from the oscillator;

supplying a first clock signal from the oscillator to the first clock connection;

supplying a second clock signal from the oscillator to the second clock connection; and

supplying a third clock signal from the oscillator to the third clock connection.

169. The method according to claim 168, wherein the oscillator is a quartz crystal oscillator.

170. The method according to claim 167 for use with a first, second, and third oscillators respectively connected to supply a respective clock signal to the respective first, second, and third clock connections.

171. The method according to claim 170, wherein each of the oscillators is a quartz crystal oscillator.

172. The method according to claim 107 further for connecting to an additional peripheral device using the standard bus, the method further comprising:

emulating the host computer to the additional peripheral device using a fourth processor executing a fourth firmware stored in a fourth memory, for receiving messages from, and transmitting messages to, the additional peripheral device over a third cable using the standard bus; and

transporting messages between the host computer and the fourth processor exclusively over a third local bus.

173. The method according to claim 172, wherein the fourth processor is communicatively coupled to the fourth processor exclusively over the third local bus for passing messages between the additional peripheral device and the host computer over the third local bus.

174. The method according to claim 107 for use with a sensor that outputs sensor data in response to a physical phenomenon coupled to the third processor, the analyzing of the messages comprising: receiving the sensor data from the sensor; and

checking the sensor data according to a criterion.

175. The method according to claim 174, wherein the sensor is an occupancy sensor for detecting occupancy of a space by a human body.

176. The method according to claim 175, wherein the sensor outputs data in response to detecting a presence of a human body by using electric effect, inductive coupling, capacitive coupling, triboelectric effect, piezoelectric effect, fiber optic transmission, or radar intrusion sensing.

177. The method according to claim 175, wherein the occupancy sensor consists of, comprises, or is based on, an acoustic sensor, opacity, geomagnetism, magnetic sensors, magnetometer, reflection of transmitted energy, infrared laser radar, microwave radar, electromagnetic induction, or vibration.

178. The method according to claim 175, wherein the occupancy sensor consists of, comprises of, or is based on, a motion sensor.

179. The method according to claim 178, wherein the motion sensor is a mechanically actuated sensor, passive or active electronic sensor, ultrasonic sensor, microwave sensor, tomographic detector, passive infrared (PIR) sensor, laser optical detector, or acoustical detector.

180. The method according to claim 175, wherein the sensor is a photoelectric sensor that responds to a visible or an invisible light, the invisible light is infrared, ultraviolet, X-rays, or gamma rays, and, wherein the photoelectric sensor is based on the photoelectric or photovoltaic effect, and consists of, or comprises, a semiconductor component that consists of, or comprises, a photodiode, or a phototransistor.

181. The method according to claim 180, wherein the photoelectric sensor is based on Charge-Coupled Method (CCD) or a Complementary Metal-Oxide Semiconductor (CMOS) component.

182. The method according to claim 107 for use with a sensor that outputs sensor data in response to a physical phenomenon produced by the peripheral device, the sensor is coupled to the third processor, the analyzing of the messages comprising:

receiving the sensor data from the sensor; and

checking the sensor data according to a criterion.

183. The method according to claim 182, wherein the sensor is a piezoelectric sensor that uses the piezoelectric effect, includes single crystal material or a piezoelectric ceramics, and uses transverse, longitudinal, or shear effect mode.

184. The method according to claim 182, wherein the sensor comprises multiple sensors arranged as a directional sensor array directed to the peripheral device.

185. The method according to claim 184, further operative to estimate the number, magnitude, frequency, Direction-Of-Arrival (DOA), distance, or speed of the signal impinging the sensor array.

186. The method according to claim 182, wherein the sensor is a thermoelectric sensor that responds to a temperature or a temperature gradient of an object or of the peripheral device.

187. The method according to claim 186, wherein the thermoelectric sensor senses the peripheral device temperature using conduction, convection, or radiation.

188. The method according to claim 186, wherein the thermoelectric sensor consists of, or comprises, a Positive Temperature Coefficient (PTC) thermistor, a Negative Temperature Coefficient (NTC) thermistor, a thermocouple, a quartz crystal, or a Resistance Temperature Detector (RTD).

189. The method according to claim 182, wherein the sensor is a photoelectric sensor that responds to visible or an invisible light, wherein the photoelectric sensor is based on the photoelectric or photovoltaic effect, and consists of, or comprises, a semiconductor component.

190. The method according to claim 189, wherein the invisible light is infrared, ultraviolet, X-rays, or gamma rays.

191. The method according to claim 190, wherein the semiconductor component consists of, or comprises, a photodiode, a phototransistor, or a solar cell.

192. The method according to claim 182, wherein the sensor is an electroacoustic sensor that responds to a sound produced by the peripheral device.

193. The method according to claim 192, wherein the electroacoustic sensor responds to audible or inaudible audio, and, wherein the electroacoustic sensor is a microphone that is omnidirectional, unidirectional, or bidirectional.

194. The method according to claim 193, wherein the microphone is based on the sensing the incident sound based motion of a diaphragm or a ribbon.

195. The method according to claim 193, wherein the microphone consists of, or comprising, a condenser, an electret, a dynamic, a ribbon, a carbon, or a piezoelectric microphone.

196. The method according to claim 182, wherein the sensor consists of, or comprises, a nanosensor, a crystal, or a semiconductor, and, wherein the sensor is an ultrasonic based or is a proximity sensor.

197. The method according to claim 107 for use with a VPN server communicating with the host computer over the Internet, the third firmware further comprises a VPN client for execution by the third processor, the method further comprising establishing a VPN connection with the VPN server over the Internet via the host computer.

198. The method according to claim 197, wherein the VPN connection is according to, uses, or is based on, Point-to-Point Tunneling Protocol (PPTP), Layer Two Tunneling Protocol (L2TP), or Secure Socket Tunneling Protocol (SSTP).

199. The method according to claim 197 further comprising receiving first messages from the peripheral device by the second processor; and transmitting, by the third processor, the first messages to the VPN server over the established VPN.

200. The method according to claim 197 further comprising receiving first messages from the VPN server over the established VPN via the host computer by the first processor; and transmitting, by the third processor, the first messages to the peripheral device.

201. The method according to claim 197, wherein the peripheral device consists of, or includes, a non- volatile memory storing a content, and the method further comprising:

reading the entire of, or a part of, the content from the non-volatile memory; and

transmitting the read content to the VPN server over the established VPN connection.

202. The method according to claim 107 further comprising:

receiving first messages from the peripheral device; and

sending the first messages to the host computer.

203. The method according to claim 202 further comprising:

receiving second messages from the host computer; and

sending the second messages to the peripheral device.

204. The method according to claim 107 for use with a criterion, wherein the analyzing of the messages comprising:

identifying a message received from the peripheral device over the second local bus or from the host computer over the first local bus; and

checking if the received message satisfies the criterion.

205. The method according to claim 204 further comprising storing the identified message in a memory.

206. The method according to claim 204 for use with a group of messages, wherein the criterion comprises the identified message being in the group.

207. The method according to claim 107 further comprising:

identifying a group containing multiple consecutively messages received from the peripheral device over the second local bus or from the host computer over the first local bus; and

checking if the received messages sequence satisfies the criterion.

208. The method according to claim 207 further comprising storing the identified received messages sequence in a memory.

209. The method according to claim 207 for use with a group of multiple messages sequences, wherein the criterion comprises the identified received messages sequence being in the group.

210. The method according to claim 209, wherein the criterion is based on a repetition of a specific message in the sequence or on an order of defined messages in the sequence.