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1. (WO2017041268) SILICON CARBIDE MOSFET DEVICE AND MANUFACTURING METHOD THEREFOR

Pub. No.:    WO/2017/041268    International Application No.:    PCT/CN2015/089335
Publication Date: Fri Mar 17 00:59:59 CET 2017 International Filing Date: Fri Sep 11 01:59:59 CEST 2015
IPC: H01L 29/78
H01L 29/06
H01L 21/04
Applicants: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
中国科学院微电子研究所
ZHUZHOU CSR TIMES ELECTRIC CO., LTD.
株洲南车时代电气股份有限公司
Inventors: TANG, Yidan
汤益丹
SHEN, Huajun
申华军
BAI, Yun
白云
ZHOU, Jingtao
周静涛
YANG, Chengyue
杨成樾
LIU, Xinyu
刘新宇
LI, Chengzhan
李诚瞻
LIU, Guoyou
刘国友
Title: SILICON CARBIDE MOSFET DEVICE AND MANUFACTURING METHOD THEREFOR
Abstract:
A self-aligned silicon carbide MOSFET device with optimized P+ regions and a manufacturing method therefor.The self-aligned silicon carbide MOSFET device is formed by connecting a plurality of identical cells in parallel, and these cells of the silicon carbide MOSFET device are evenly arranged.The cell of the silicon carbide MOSFET device comprises two source electrodes (1), one gate electrode (2), one gate oxidation layer (3), two N+ source regions (4), two P+ contact regions (5), two P-wells (6), one N- drift layer (7), one buffer layer (8), one N+ substrate (9), one drain electrode (10) and one isolation medium layer (11).By optimizing P+ regions, good source electrode ohmic contact is formed, and on-resistance is reduced. At the same time, source electrodes (1) and P-wells (6) are in short-circuit connection, so that a parasitic transistor effect of a parasitic NPN and PiN is prevented. The conducting characteristic and a breakdown characteristic of a device are both considered. The present invention can be applied to high-voltage high-frequency silicon carbide MOSFET devices.By adopting a self-alignment manufacturing method, the process is simplified, a channel size is accurately controlled, and transverse and longitudinal power MOSFETs can be manufactured.