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1. (WO2017039962) INTEGRATION OF INDUCTORS WITH ADVANCED-NODE SYSTEM-ON-CHIP (SOC) USING GLASS WAFER WITH INDUCTORS AND WAFER-TO-WAFER JOINING
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2017/039962 International Application No.: PCT/US2016/045998
Publication Date: 09.03.2017 International Filing Date: 08.08.2016
IPC:
H01L 23/64 (2006.01) ,G06F 1/32 (2006.01) ,H02M 1/00 (2007.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
58
Structural electrical arrangements for semiconductor devices not otherwise provided for
64
Impedance arrangements
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
1
Details not covered by groups G06F3/-G06F13/82
26
Power supply means, e.g. regulation thereof
32
Means for saving power
H ELECTRICITY
02
GENERATION, CONVERSION, OR DISTRIBUTION OF ELECTRIC POWER
M
APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
1
Details of apparatus for conversion
Applicants:
QUALCOMM INCORPORATED [US/US]; ATTN: International IP Administration 5775 Morehouse Drive San Diego, California 92121-1714, US
Inventors:
ARABI, Karim; US
SHENOY, Ravindra Vaman; US
GOUSEV, Evgeni Petrovich; US
ERTURK, Mete; US
Agent:
CICCOZZI, John L.; US
Priority Data:
14/843,96402.09.2015US
Title (EN) INTEGRATION OF INDUCTORS WITH ADVANCED-NODE SYSTEM-ON-CHIP (SOC) USING GLASS WAFER WITH INDUCTORS AND WAFER-TO-WAFER JOINING
(FR) INTÉGRATION D'INDUCTEURS AVEC UN SYSTÈME SUR PUCE (SOC) À NOEUD AVANCÉ AU MOYEN DE PLAQUETTES EN VERRE COMPORTANT DES INDUCTEURS ET UNE LIAISON PLAQUETTE À PLAQUETTE
Abstract:
(EN) A voltage regulator having a coil inductor is integrated or embedded in a system-on-chip (SOC) device. The coil inductor is fabricated on an inductor wafer with through vias, and the inductor wafer is joined with an SOC wafer for integration with the SOC device.
(FR) Un régulateur de tension comportant un inducteur à bobine est intégré ou incorporé dans un dispositif à système sur puce (SOC). L'inducteur à bobine est fabriqué sur une plaquette d'inducteur comportant des trous traversants, et la plaquette d'inducteur est liée à une plaquette de système sur puce (SOC) pour l'intégration avec le dispositif à système sur puce (SOC).
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)